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Mon, 24 Jun 2024 16:46:04 +0200 (CEST) Received: from messagerie.si.c-s.fr (messagerie.si.c-s.fr [192.168.25.192]) by pegase1.c-s.fr (Postfix) with ESMTP id 4W79kd2hBrz9vDm; Mon, 24 Jun 2024 16:46:01 +0200 (CEST) Received: from localhost (localhost [127.0.0.1]) by messagerie.si.c-s.fr (Postfix) with ESMTP id 57EDE8B763; Mon, 24 Jun 2024 16:46:01 +0200 (CEST) X-Virus-Scanned: amavisd-new at c-s.fr Received: from messagerie.si.c-s.fr ([127.0.0.1]) by localhost (messagerie.si.c-s.fr [127.0.0.1]) (amavisd-new, port 10023) with ESMTP id dl2xSjanXuqw; Mon, 24 Jun 2024 16:46:01 +0200 (CEST) Received: from PO20335.idsi0.si.c-s.fr (unknown [192.168.233.33]) by messagerie.si.c-s.fr (Postfix) with ESMTP id CF8868B766; Mon, 24 Jun 2024 16:46:00 +0200 (CEST) From: Christophe Leroy To: Andrew Morton , Jason Gunthorpe , Peter Xu , Oscar Salvador , Michael Ellerman , Nicholas Piggin Cc: Christophe Leroy , linux-kernel@vger.kernel.org, linux-mm@kvack.org, linuxppc-dev@lists.ozlabs.org Subject: [PATCH v6 05/23] powerpc/64e: Consolidate TLB miss handler patching Date: Mon, 24 Jun 2024 16:45:31 +0200 Message-ID: <36c74a4064fd41b7d6c5091a246af3b701796ad9.1719240269.git.christophe.leroy@csgroup.eu> X-Mailer: git-send-email 2.44.0 In-Reply-To: References: MIME-Version: 1.0 X-Developer-Signature: v=1; a=ed25519-sha256; t=1719240333; l=2333; i=christophe.leroy@csgroup.eu; s=20211009; h=from:subject:message-id; bh=yAiKCEuhEewOEpS5oDWNvn73wPUuV/itXZW+PYTcfsA=; b=+XTT6AkxG3EFjxftGNfmlTkUuaYmJH01p/9nUYoAQFaR+jzgkqMC8HxjrurdqmEWKZCzMq9Tp VbObSpB9doeAc4xp8h+7qaY0bGS9yfOxnJUZSJsS/t7n5CQEqFksnn+ X-Developer-Key: i=christophe.leroy@csgroup.eu; a=ed25519; pk=HIzTzUj91asvincQGOFx6+ZF5AoUuP9GdOtQChs7Mm0= X-Rspam-User: X-Rspamd-Server: rspam01 X-Rspamd-Queue-Id: AF1104001A X-Stat-Signature: wzt37xi63t6zy6nt3t3q4mz4q3jh8849 X-HE-Tag: 1719240386-477221 X-HE-Meta: U2FsdGVkX19mp1PLg5np5SeIzUMybaLRwWCRg7uRqTcyiYxYDhbmKkVmOfv3Ncc3SZIszansWfJHosIMRxYW2oRC0K/VbQLzNY5qx5bWvTldGuG+pC8UBgSnzv1SnGqLsSzTCs6yaWcwWzpt3MemWTeZkEXck3MuvvPMpqXYslDHW6DCWVvZfAOtJJeFLp5vOcguSm/+Qv3aEOUQlITO7O4zKw7YQxCEntnfcWLMNvdfEBk6pJPrY+nnte21iMAiDavJvr6yr+Vsq+pfymB9JxhUvZsb8O+zZDjJgbvFv70N3b0J1n2wpDz/FIJrqC8JKyBU3h1hYxiFIUW5O0sVGP1Piib6OoinsTztEufprrLWG2QmFn6n0IAB+fbZa4H9tpGuNvKXXJUzBP1xyazlq6v7rV0o7v+dQFmq2tonE4F9SBKiCb7D76/q89UmzYS15CBdfqkiVCwQHYdfmghkcBOzmiRl0f11Ukvzl5jbs3UZQrEeWhj5kIfhrDd1SAPk+lw+NSz0phUrbaM7bP7kkuuyOar6FsXyTis4toZUJLsrey5nOmzC/EqLBdE+uWo/D+gvLAk8JwHv1mo394G+DoACsEil69ReZVm3razk8IhQ42jMfiVcBYntKOACIVb0EWs52VX1rzV5pdE9q50HVHEcgvZcImXm1+CceDD5FmEA9/0Wq72gjh3OZzgHMyojQT8HVxZ4nNOjHNxMo7MbCq7nTbtBPOvu0OXhxkvHIEBzS0ZfnTttSYhAH+ApJ1S9bnmuLtlIKdGU5FL/UnQ2od4ynm2XqoaRVFnCq/Jfs0Jtp9gdK6ykjN/emZgTd2m0bhBMXfD//CNclvtGdOF/U/ZgBVGyhrHn1JjDeN9aPqLQSE2Mse2oVPoDxmn3MdMOmJt0rkOt/H0ObfZUvWG4DkxruYlsPJvlQvuN8nw6G13cqsZZyKZ72LS3iOSVWy3dttP80LQxFMgurn+/VDI wNRKB72S eR8U5uKFTe1+/GrbGklyjlgOdI2Z4ZSXzwxUyFTNHV/RyiwdREDfze/Pz0LGSTTw+uKffavCy/a5C2XWW1zTiahTz2NFPnitqH6BTPKRen6PoDrjMMRrh05skGSYqkj6Min8yYBx8+t3r4tOmr3hOlx3gutpLsDbANYZVcq4nfDlrwcI= X-Bogosity: Ham, tests=bogofilter, spamicity=0.000000, version=1.2.4 Sender: owner-linux-mm@kvack.org Precedence: bulk X-Loop: owner-majordomo@kvack.org List-ID: List-Subscribe: List-Unsubscribe: From: Michael Ellerman The 64e TLB miss handler patching is done in setup_mmu_htw(), and then again immediately afterward in early_init_mmu_global(). Consolidate it into a single location. Signed-off-by: Michael Ellerman Signed-off-by: Christophe Leroy --- arch/powerpc/mm/nohash/tlb_64e.c | 38 +++++++++++++------------------- 1 file changed, 15 insertions(+), 23 deletions(-) diff --git a/arch/powerpc/mm/nohash/tlb_64e.c b/arch/powerpc/mm/nohash/tlb_64e.c index 21c4b2442fcf..d83ecf466929 100644 --- a/arch/powerpc/mm/nohash/tlb_64e.c +++ b/arch/powerpc/mm/nohash/tlb_64e.c @@ -169,24 +169,6 @@ static void __init setup_page_sizes(void) } } -static void __init setup_mmu_htw(void) -{ - /* - * If we want to use HW tablewalk, enable it by patching the TLB miss - * handlers to branch to the one dedicated to it. - */ - - switch (book3e_htw_mode) { - case PPC_HTW_E6500: - extlb_level_exc = EX_TLB_SIZE; - patch_exception(0x1c0, exc_data_tlb_miss_e6500_book3e); - patch_exception(0x1e0, exc_instruction_tlb_miss_e6500_book3e); - break; - } - pr_info("MMU: Book3E HW tablewalk %s\n", - book3e_htw_mode != PPC_HTW_NONE ? "enabled" : "not supported"); -} - /* * Early initialization of the MMU TLB code */ @@ -252,15 +234,25 @@ static void __init early_init_mmu_global(void) /* Look for supported page sizes */ setup_page_sizes(); - /* Look for HW tablewalk support */ - setup_mmu_htw(); - - if (book3e_htw_mode == PPC_HTW_NONE) { - extlb_level_exc = EX_TLB_SIZE; + /* + * If we want to use HW tablewalk, enable it by patching the TLB miss + * handlers to branch to the one dedicated to it. + */ + extlb_level_exc = EX_TLB_SIZE; + switch (book3e_htw_mode) { + case PPC_HTW_E6500: + patch_exception(0x1c0, exc_data_tlb_miss_e6500_book3e); + patch_exception(0x1e0, exc_instruction_tlb_miss_e6500_book3e); + break; + case PPC_HTW_NONE: patch_exception(0x1c0, exc_data_tlb_miss_bolted_book3e); patch_exception(0x1e0, exc_instruction_tlb_miss_bolted_book3e); + break; } + pr_info("MMU: Book3E HW tablewalk %s\n", + book3e_htw_mode != PPC_HTW_NONE ? "enabled" : "not supported"); + /* Set the global containing the top of the linear mapping * for use by the TLB miss code */