Message ID | 5328a76b3fab1f20b3ffc400ca2402bec19d9700.1655761627.git.ashish.kalra@amd.com (mailing list archive) |
---|---|
State | New |
Headers | show |
Series | Add AMD Secure Nested Paging (SEV-SNP) | expand |
On Mon, Jun 20, 2022 at 11:03:27PM +0000, Ashish Kalra wrote: > @@ -12,15 +14,17 @@ > * bit 4 == 1: fault was an instruction fetch > * bit 5 == 1: protection keys block access > * bit 15 == 1: SGX MMU page-fault > + * bit 31 == 1: fault was due to RMP violation > */ > enum x86_pf_error_code { > - X86_PF_PROT = 1 << 0, > - X86_PF_WRITE = 1 << 1, > - X86_PF_USER = 1 << 2, > - X86_PF_RSVD = 1 << 3, > - X86_PF_INSTR = 1 << 4, > - X86_PF_PK = 1 << 5, > - X86_PF_SGX = 1 << 15, > + X86_PF_PROT = BIT_ULL(0), > + X86_PF_WRITE = BIT_ULL(1), > + X86_PF_USER = BIT_ULL(2), > + X86_PF_RSVD = BIT_ULL(3), > + X86_PF_INSTR = BIT_ULL(4), > + X86_PF_PK = BIT_ULL(5), > + X86_PF_SGX = BIT_ULL(15), > + X86_PF_RMP = BIT_ULL(31), Yeah, I remember dhansen asked for those to use the BIT() macro but the _ULL is an overkill. Those PF flags are 32 and they fit in an unsigned int. But we don't have BUT_UI() so I guess the next best thing - BIT() - which uses UL internally, should be good enough. So pls use BIT() here - not BIT_ULL(). Thx.
diff --git a/arch/x86/include/asm/trap_pf.h b/arch/x86/include/asm/trap_pf.h index 10b1de500ab1..89b705114b3f 100644 --- a/arch/x86/include/asm/trap_pf.h +++ b/arch/x86/include/asm/trap_pf.h @@ -2,6 +2,8 @@ #ifndef _ASM_X86_TRAP_PF_H #define _ASM_X86_TRAP_PF_H +#include <linux/bits.h> /* BIT() macro */ + /* * Page fault error code bits: * @@ -12,15 +14,17 @@ * bit 4 == 1: fault was an instruction fetch * bit 5 == 1: protection keys block access * bit 15 == 1: SGX MMU page-fault + * bit 31 == 1: fault was due to RMP violation */ enum x86_pf_error_code { - X86_PF_PROT = 1 << 0, - X86_PF_WRITE = 1 << 1, - X86_PF_USER = 1 << 2, - X86_PF_RSVD = 1 << 3, - X86_PF_INSTR = 1 << 4, - X86_PF_PK = 1 << 5, - X86_PF_SGX = 1 << 15, + X86_PF_PROT = BIT_ULL(0), + X86_PF_WRITE = BIT_ULL(1), + X86_PF_USER = BIT_ULL(2), + X86_PF_RSVD = BIT_ULL(3), + X86_PF_INSTR = BIT_ULL(4), + X86_PF_PK = BIT_ULL(5), + X86_PF_SGX = BIT_ULL(15), + X86_PF_RMP = BIT_ULL(31), }; #endif /* _ASM_X86_TRAP_PF_H */ diff --git a/arch/x86/mm/fault.c b/arch/x86/mm/fault.c index fad8faa29d04..a4c270e99f7f 100644 --- a/arch/x86/mm/fault.c +++ b/arch/x86/mm/fault.c @@ -546,6 +546,7 @@ show_fault_oops(struct pt_regs *regs, unsigned long error_code, unsigned long ad !(error_code & X86_PF_PROT) ? "not-present page" : (error_code & X86_PF_RSVD) ? "reserved bit violation" : (error_code & X86_PF_PK) ? "protection keys violation" : + (error_code & X86_PF_RMP) ? "RMP violation" : "permissions violation"); if (!(error_code & X86_PF_USER) && user_mode(regs)) {