From patchwork Mon Nov 23 20:07:51 2020 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Andrey Konovalov X-Patchwork-Id: 11926411 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org X-Spam-Level: X-Spam-Status: No, score=-16.5 required=3.0 tests=BAYES_00, DKIM_ADSP_CUSTOM_MED,DKIM_INVALID,DKIM_SIGNED,HEADER_FROM_DIFFERENT_DOMAINS, INCLUDES_CR_TRAILER,INCLUDES_PATCH,MAILING_LIST_MULTI,SPF_HELO_NONE,SPF_PASS, URIBL_BLOCKED,USER_AGENT_GIT autolearn=ham autolearn_force=no version=3.4.0 Received: from mail.kernel.org (mail.kernel.org [198.145.29.99]) by smtp.lore.kernel.org (Postfix) with ESMTP id 0AB37C63697 for ; Mon, 23 Nov 2020 20:09:34 +0000 (UTC) Received: from kanga.kvack.org (kanga.kvack.org [205.233.56.17]) by mail.kernel.org (Postfix) with ESMTP id 7CF1320715 for ; Mon, 23 Nov 2020 20:09:33 +0000 (UTC) Authentication-Results: mail.kernel.org; dkim=fail reason="signature verification failed" (2048-bit key) header.d=google.com header.i=@google.com header.b="Bnb8vGsj" DMARC-Filter: OpenDMARC Filter v1.3.2 mail.kernel.org 7CF1320715 Authentication-Results: mail.kernel.org; dmarc=fail (p=reject dis=none) header.from=google.com Authentication-Results: mail.kernel.org; spf=pass smtp.mailfrom=owner-linux-mm@kvack.org Received: by kanga.kvack.org (Postfix) id ACDF16B0073; Mon, 23 Nov 2020 15:09:32 -0500 (EST) Received: by kanga.kvack.org (Postfix, from userid 40) id A0EFF6B0074; Mon, 23 Nov 2020 15:09:32 -0500 (EST) X-Delivered-To: int-list-linux-mm@kvack.org Received: by kanga.kvack.org (Postfix, from userid 63042) id 884E76B0075; Mon, 23 Nov 2020 15:09:32 -0500 (EST) X-Delivered-To: linux-mm@kvack.org Received: from forelay.hostedemail.com (smtprelay0004.hostedemail.com [216.40.44.4]) by kanga.kvack.org (Postfix) with ESMTP id 4CC1A6B0073 for ; Mon, 23 Nov 2020 15:09:32 -0500 (EST) Received: from smtpin27.hostedemail.com (10.5.19.251.rfc1918.com [10.5.19.251]) by forelay05.hostedemail.com (Postfix) with ESMTP id E7EBE181AEF1D for ; Mon, 23 Nov 2020 20:09:31 +0000 (UTC) X-FDA: 77516772942.27.bat94_111395327368 Received: from filter.hostedemail.com (10.5.16.251.rfc1918.com [10.5.16.251]) by smtpin27.hostedemail.com (Postfix) with ESMTP id CA4023D669 for ; Mon, 23 Nov 2020 20:09:31 +0000 (UTC) X-HE-Tag: bat94_111395327368 X-Filterd-Recvd-Size: 7534 Received: from mail-yb1-f202.google.com (mail-yb1-f202.google.com [209.85.219.202]) by imf10.hostedemail.com (Postfix) with ESMTP for ; Mon, 23 Nov 2020 20:09:31 +0000 (UTC) Received: by mail-yb1-f202.google.com with SMTP id a6so24772504ybi.0 for ; Mon, 23 Nov 2020 12:09:31 -0800 (PST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=20161025; h=sender:date:in-reply-to:message-id:mime-version:references:subject :from:to:cc; bh=vnZk23A1hkByjQlL/Jowfu6pOB5axCxl0nNATXG6I/s=; b=Bnb8vGsj+uBu1NiG43YXYtRo6IHMEtrhfCmhJayDtfNIiETn/hQ8oa2GfXRlUmlrF9 ZLJPF3ogHC2tjeqnPwyw+i6EfPpO/U62ZfbQRuSs2+Pvd56xo4k+ay4knVPc4gShW9uU tu9KogljqxWykOyfzCSFsKjtXGTsekcmJvs4xCpA1brQW86d44IpNBgDHPK5vLHND9pY OBj3BCewboWLvj33rcb+/cY8wx2TFgtXPa+zmg+gey1Grkk5FCMJ7DYWBWoPex5dpIW6 AMt7faOfqlo6QTxu2b2yPnZu+NcfElTRxXYYuHjIVk5GXrGfN8JYuUBGPGsQAsD2KoHH me+Q== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20161025; h=x-gm-message-state:sender:date:in-reply-to:message-id:mime-version :references:subject:from:to:cc; bh=vnZk23A1hkByjQlL/Jowfu6pOB5axCxl0nNATXG6I/s=; b=gBoye8YrkFzIldVOohDeYVOcI/dNG3o7XiX9b37Cv0KOv4ZwMElGahXJOU2p8lQkdk AsBzBjFaoX8MrSKVSjdpvfj6TM6MxitkUyR6nT0kWrBJ/EZ5Xck+FU/2cwBhrC4uAJbe hxAyIbaqtNvyJUt8zdWqnNC76dlYMB+MrJtdvMF7s3/CtAYBaiwRk9o6IMUilmqXUDip YdN1fSIYZIblF7tuhFZAu/5ssVPTUtr0JvVyFe4q/MTIjNeF3p9keGhnz/jUTi+6YbSa 5wYk1PgquBcWA4z8LR2fAym+ub8jaK4Dql8DEYoWBV5tgQSeqbuQ22rcPhTwgKmhNIOj MdxQ== X-Gm-Message-State: AOAM53134tt8eWrg98haKUygU9TEQQ2hUI9GEWbghqJ6rj4+jxgmajNC QqIsoJf9kV/Ppa3wygQdnGDK1U+5itmEYNG5 X-Google-Smtp-Source: ABdhPJxiE0/zul085LjGuj2Tqye0cfqi7NIjzwx4wpof9kbF3apSnDQiQg+qv1iIvnd12NahDQi7cKz3gMiYck+5 X-Received: from andreyknvl3.muc.corp.google.com ([2a00:79e0:15:13:7220:84ff:fe09:7e9d]) (user=andreyknvl job=sendgmr) by 2002:a25:786:: with SMTP id 128mr1448326ybh.19.1606162170465; Mon, 23 Nov 2020 12:09:30 -0800 (PST) Date: Mon, 23 Nov 2020 21:07:51 +0100 In-Reply-To: Message-Id: Mime-Version: 1.0 References: X-Mailer: git-send-email 2.29.2.454.gaff20da3a2-goog Subject: [PATCH mm v11 27/42] arm64: mte: Add in-kernel tag fault handler From: Andrey Konovalov To: Andrew Morton Cc: Catalin Marinas , Will Deacon , Vincenzo Frascino , Dmitry Vyukov , Andrey Ryabinin , Alexander Potapenko , Marco Elver , Evgenii Stepanov , Branislav Rankov , Kevin Brodsky , kasan-dev@googlegroups.com, linux-arm-kernel@lists.infradead.org, linux-mm@kvack.org, linux-kernel@vger.kernel.org, Andrey Konovalov X-Bogosity: Ham, tests=bogofilter, spamicity=0.000000, version=1.2.4 Sender: owner-linux-mm@kvack.org Precedence: bulk X-Loop: owner-majordomo@kvack.org List-ID: From: Vincenzo Frascino Add the implementation of the in-kernel fault handler. When a tag fault happens on a kernel address: * MTE is disabled on the current CPU, * the execution continues. When a tag fault happens on a user address: * the kernel executes do_bad_area() and panics. The tag fault handler for kernel addresses is currently empty and will be filled in by a future commit. Signed-off-by: Vincenzo Frascino Co-developed-by: Andrey Konovalov Signed-off-by: Andrey Konovalov Reviewed-by: Catalin Marinas Signed-off-by: Catalin Marinas Reviewed-by: Vincenzo Frascino --- Change-Id: I9b8aa79567f7c45f4d6a1290efcf34567e620717 --- arch/arm64/include/asm/uaccess.h | 23 ++++++++++++++++ arch/arm64/mm/fault.c | 45 ++++++++++++++++++++++++++++++++ 2 files changed, 68 insertions(+) diff --git a/arch/arm64/include/asm/uaccess.h b/arch/arm64/include/asm/uaccess.h index 385a189f7d39..d841a560fae7 100644 --- a/arch/arm64/include/asm/uaccess.h +++ b/arch/arm64/include/asm/uaccess.h @@ -200,13 +200,36 @@ do { \ CONFIG_ARM64_PAN)); \ } while (0) +/* + * The Tag Check Flag (TCF) mode for MTE is per EL, hence TCF0 + * affects EL0 and TCF affects EL1 irrespective of which TTBR is + * used. + * The kernel accesses TTBR0 usually with LDTR/STTR instructions + * when UAO is available, so these would act as EL0 accesses using + * TCF0. + * However futex.h code uses exclusives which would be executed as + * EL1, this can potentially cause a tag check fault even if the + * user disables TCF0. + * + * To address the problem we set the PSTATE.TCO bit in uaccess_enable() + * and reset it in uaccess_disable(). + * + * The Tag check override (TCO) bit disables temporarily the tag checking + * preventing the issue. + */ static inline void uaccess_disable(void) { + asm volatile(ALTERNATIVE("nop", SET_PSTATE_TCO(0), + ARM64_MTE, CONFIG_KASAN_HW_TAGS)); + __uaccess_disable(ARM64_HAS_PAN); } static inline void uaccess_enable(void) { + asm volatile(ALTERNATIVE("nop", SET_PSTATE_TCO(1), + ARM64_MTE, CONFIG_KASAN_HW_TAGS)); + __uaccess_enable(ARM64_HAS_PAN); } diff --git a/arch/arm64/mm/fault.c b/arch/arm64/mm/fault.c index 183d1e6dd9e0..1e4b9353c68a 100644 --- a/arch/arm64/mm/fault.c +++ b/arch/arm64/mm/fault.c @@ -34,6 +34,7 @@ #include #include #include +#include #include #include #include @@ -297,6 +298,44 @@ static void die_kernel_fault(const char *msg, unsigned long addr, do_exit(SIGKILL); } +static void report_tag_fault(unsigned long addr, unsigned int esr, + struct pt_regs *regs) +{ +} + +static void do_tag_recovery(unsigned long addr, unsigned int esr, + struct pt_regs *regs) +{ + static bool reported; + + if (!READ_ONCE(reported)) { + report_tag_fault(addr, esr, regs); + WRITE_ONCE(reported, true); + } + + /* + * Disable MTE Tag Checking on the local CPU for the current EL. + * It will be done lazily on the other CPUs when they will hit a + * tag fault. + */ + sysreg_clear_set(sctlr_el1, SCTLR_ELx_TCF_MASK, SCTLR_ELx_TCF_NONE); + isb(); +} + +static bool is_el1_mte_sync_tag_check_fault(unsigned int esr) +{ + unsigned int ec = ESR_ELx_EC(esr); + unsigned int fsc = esr & ESR_ELx_FSC; + + if (ec != ESR_ELx_EC_DABT_CUR) + return false; + + if (fsc == ESR_ELx_FSC_MTE) + return true; + + return false; +} + static void __do_kernel_fault(unsigned long addr, unsigned int esr, struct pt_regs *regs) { @@ -313,6 +352,12 @@ static void __do_kernel_fault(unsigned long addr, unsigned int esr, "Ignoring spurious kernel translation fault at virtual address %016lx\n", addr)) return; + if (is_el1_mte_sync_tag_check_fault(esr)) { + do_tag_recovery(addr, esr, regs); + + return; + } + if (is_el1_permission_fault(addr, esr, regs)) { if (esr & ESR_ELx_WNR) msg = "write to read-only memory";