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Tue, 18 Jun 2024 14:40:50 +0000 (UTC) Received: from ilclasset02 (ilclasset02.mot.com [100.64.49.13]) (using TLSv1.3 with cipher TLS_AES_256_GCM_SHA384 (256/256 bits) key-exchange ECDHE (P-256) server-signature RSA-PSS (2048 bits) server-digest SHA256) (No client certificate requested) (Authenticated sender: mbland) by ilclmmrp02.lenovo.com (Postfix) with ESMTPSA id 4W3TvP5ry1z3p6jp; Tue, 18 Jun 2024 14:40:49 +0000 (UTC) Date: Tue, 18 Jun 2024 09:40:48 -0500 From: Maxwell Bland To: linux-mm@kvack.org Cc: Catalin Marinas , Will Deacon , Jonathan Corbet , Andrew Morton , Ard Biesheuvel , Mark Rutland , Christophe Leroy , Maxwell Bland , Alexandre Ghiti , linux-arm-kernel@lists.infradead.org, linux-doc@vger.kernel.org, linux-kernel@vger.kernel.org Subject: [PATCH v4 2/5] arm64: non leaf ptdump support Message-ID: References: MIME-Version: 1.0 Content-Disposition: inline In-Reply-To: X-Proofpoint-ORIG-GUID: kmBwrD3JLnyF3RFV3h1ScHXshTVxVoVj X-Proofpoint-GUID: kmBwrD3JLnyF3RFV3h1ScHXshTVxVoVj X-Proofpoint-Virus-Version: vendor=baseguard engine=ICAP:2.0.293,Aquarius:18.0.1039,Hydra:6.0.680,FMLib:17.12.28.16 definitions=2024-06-18_02,2024-06-17_01,2024-05-17_01 X-Proofpoint-Spam-Details: rule=outbound_notspam policy=outbound score=0 clxscore=1015 spamscore=0 mlxscore=0 impostorscore=0 phishscore=0 malwarescore=0 bulkscore=0 lowpriorityscore=0 priorityscore=1501 mlxlogscore=914 suspectscore=0 adultscore=0 classifier=spam adjust=0 reason=mlx scancount=1 engine=8.19.0-2405170001 definitions=main-2406180110 X-Rspamd-Server: rspam03 X-Rspam-User: X-Rspamd-Queue-Id: 15D4114000D X-Stat-Signature: scj6co67wrttfkaazufhs3jfph83f1hh X-HE-Tag: 1718721662-574113 X-HE-Meta: U2FsdGVkX19ok79Y7rSPFaU7a2syuwsszLcqemfiq/J3oCANu9Wh2JGyMZA97+s3Em4oBILTw5KINxDjxtaUeCQDBtiKu5BhkeFEI3DB8IKaaaJkU1c3L71nPEZwdcHrS0WG7pVdY9jTHfHqhN3HH0nVEjoAXqaHQApjkzAxCXAD5Uc/pM6A9diYixZrU8U87X58uw1yWteWdoPiL1XViaOHSCYia5WG9yVFBbFSIKg2yVmH7DhzZGE1C36ecwhPU9Ye81nN63wfLQktFg5BXY+mD6uU6XqlrCaW96aB2ADC5XRO3uwVAIpjvyIM3vZgsTSyD+W2DsyFCQ3/JfE+BBJEJpzmTm6Gyf1sx9b4mIpL7BYVxNWdLdeejnR0jaGz9znPFYDaebW6KdFIObbGL0XBp+wXVme0mSYDUehLFmQgds5HglgKKK7cpe+YYdOLGzvKnIpWo/z2FXPTtLe6LZk5ef4zKgE7980rGyraFmrjnFEcruwKsL6mOyxKf3VYeAfFYOhGt/ryx4ptt5k17+vJ88C2q/O2PzHEH0ubvPH3jjKwbAL7RpzvbAulj/DmO3s6nehHl8C+phSZB6jkq9jD8TloC9+VXBPhDLr/nSrf92RIlfsDlOQz+V6NIYKPF0eURt8QkBtY3tW+AscA+ETjAYTQYxjEqNCpc3c1jgMDwz+z2CpxQF1T0ncSBO1f5UO07Ab3+/pYupTTKQMWPqcFQHPjpXd236PUFQa8lJ6DjNvOVFoAjb56VBU+EDJSYO8BfxAXvBz8BUlZ9aVtsZ8aS1s0ZVfE41NRZRqUQfGVWvyCK4i6MY8aROy0IWvc153P+Wzvqwl38BmIClMTQIBG6O1sK7cLiW8/IVZzuXkHCdS6ZHgZonwPmVUP1Iy5VmqgothkUTR2KeT1dz7eg1sNMt/XcoyTEuIY16BYt2Fs1hj/odQaJiG2E69Z5GnwLSb1npCJXmOPFotZcp2 wU1VOQxG rJDr3En3Qs8Yzg2skOnsSA9ySdgH/rBdHErgo3YG9HT4JcC8pPRakdEVigvE808vIkCBDYcxBw5DJhvb6MbjpLSAAp06o3ByrDjyXnkXCRpIlq4nLQ0qbxOQnGMQp9nXaT6+mXt4dofSQO6vLK7Rhv/jTg1WRNCeu+Ewoky3DJKqs9ntoAT2n613apTup//RCEQHcMnQx7mDTJZa3UJ5z2JQY+rYZmVrkN6HymkrHDwZ7MWX5PWACBVD2xVyaVwghlQzL3VR1NWfBfc7p3iUuCj7cl278cpDc8uDCiaMRs9+8VkFlamYnYvxria8vl518vVrF/2tbS7Lgod8= X-Bogosity: Ham, tests=bogofilter, spamicity=0.000000, version=1.2.4 Sender: owner-linux-mm@kvack.org Precedence: bulk X-Loop: owner-majordomo@kvack.org List-ID: List-Subscribe: List-Unsubscribe: Separate the pte_bits used in ptdump from pxd_bits used by pmd, p4d, pud, and pgd descriptors, thereby adding support for printing key intermediate directory protection bits, such as PXNTable, and enable the associated support Kconfig option. Signed-off-by: Maxwell Bland --- arch/arm64/Kconfig | 1 + arch/arm64/mm/ptdump.c | 140 ++++++++++++++++++++++++++++++++++++----- 2 files changed, 125 insertions(+), 16 deletions(-) diff --git a/arch/arm64/Kconfig b/arch/arm64/Kconfig index 5d91259ee7b5..f4c3290160db 100644 --- a/arch/arm64/Kconfig +++ b/arch/arm64/Kconfig @@ -98,6 +98,7 @@ config ARM64 select ARCH_SUPPORTS_NUMA_BALANCING select ARCH_SUPPORTS_PAGE_TABLE_CHECK select ARCH_SUPPORTS_PER_VMA_LOCK + select ARCH_SUPPORTS_NON_LEAF_PTDUMP select ARCH_WANT_BATCHED_UNMAP_TLB_FLUSH select ARCH_WANT_COMPAT_IPC_PARSE_VERSION if COMPAT select ARCH_WANT_DEFAULT_BPF_JIT diff --git a/arch/arm64/mm/ptdump.c b/arch/arm64/mm/ptdump.c index 6986827e0d64..8f0b459c13ed 100644 --- a/arch/arm64/mm/ptdump.c +++ b/arch/arm64/mm/ptdump.c @@ -24,6 +24,7 @@ #include #include #include +#include #define pt_dump_seq_printf(m, fmt, args...) \ @@ -105,11 +106,6 @@ static const struct prot_bits pte_bits[] = { .val = PTE_CONT, .set = "CON", .clear = " ", - }, { - .mask = PTE_TABLE_BIT, - .val = PTE_TABLE_BIT, - .set = " ", - .clear = "BLK", }, { .mask = PTE_UXN, .val = PTE_UXN, @@ -143,34 +139,129 @@ static const struct prot_bits pte_bits[] = { } }; +static const struct prot_bits pxd_bits[] = { + { + .mask = PMD_SECT_VALID, + .val = PMD_SECT_VALID, + .set = " ", + .clear = "F", + }, { + .mask = PMD_TABLE_BIT, + .val = PMD_TABLE_BIT, + .set = "TBL", + .clear = "BLK", + }, { + .mask = PMD_SECT_USER, + .val = PMD_SECT_USER, + .set = "USR", + .clear = " ", + }, { + .mask = PMD_SECT_RDONLY, + .val = PMD_SECT_RDONLY, + .set = "ro", + .clear = "RW", + }, { + .mask = PMD_SECT_S, + .val = PMD_SECT_S, + .set = "SHD", + .clear = " ", + }, { + .mask = PMD_SECT_AF, + .val = PMD_SECT_AF, + .set = "AF", + .clear = " ", + }, { + .mask = PMD_SECT_NG, + .val = PMD_SECT_NG, + .set = "NG", + .clear = " ", + }, { + .mask = PMD_SECT_CONT, + .val = PMD_SECT_CONT, + .set = "CON", + .clear = " ", + }, { + .mask = PMD_SECT_PXN, + .val = PMD_SECT_PXN, + .set = "NX", + .clear = "x ", + }, { + .mask = PMD_SECT_UXN, + .val = PMD_SECT_UXN, + .set = "UXN", + .clear = " ", + }, { + .mask = PMD_TABLE_PXN, + .val = PMD_TABLE_PXN, + .set = "NXTbl", + .clear = " ", + }, { + .mask = PMD_TABLE_UXN, + .val = PMD_TABLE_UXN, + .set = "UXNTbl", + .clear = " ", + }, { + .mask = PTE_GP, + .val = PTE_GP, + .set = "GP", + .clear = " ", + }, { + .mask = PMD_ATTRINDX_MASK, + .val = PMD_ATTRINDX(MT_DEVICE_nGnRnE), + .set = "DEVICE/nGnRnE", + }, { + .mask = PMD_ATTRINDX_MASK, + .val = PMD_ATTRINDX(MT_DEVICE_nGnRE), + .set = "DEVICE/nGnRE", + }, { + .mask = PMD_ATTRINDX_MASK, + .val = PMD_ATTRINDX(MT_NORMAL_NC), + .set = "MEM/NORMAL-NC", + }, { + .mask = PMD_ATTRINDX_MASK, + .val = PMD_ATTRINDX(MT_NORMAL), + .set = "MEM/NORMAL", + }, { + .mask = PMD_ATTRINDX_MASK, + .val = PMD_ATTRINDX(MT_NORMAL_TAGGED), + .set = "MEM/NORMAL-TAGGED", + } +}; + struct pg_level { const struct prot_bits *bits; char name[4]; int num; u64 mask; + unsigned long size; }; static struct pg_level pg_level[] __ro_after_init = { { /* pgd */ .name = "PGD", - .bits = pte_bits, - .num = ARRAY_SIZE(pte_bits), + .bits = pxd_bits, + .num = ARRAY_SIZE(pxd_bits), + .size = PGDIR_SIZE, }, { /* p4d */ .name = "P4D", - .bits = pte_bits, - .num = ARRAY_SIZE(pte_bits), + .bits = pxd_bits, + .num = ARRAY_SIZE(pxd_bits), + .size = P4D_SIZE, }, { /* pud */ .name = "PUD", - .bits = pte_bits, - .num = ARRAY_SIZE(pte_bits), + .bits = pxd_bits, + .num = ARRAY_SIZE(pxd_bits), + .size = PUD_SIZE, }, { /* pmd */ .name = "PMD", - .bits = pte_bits, - .num = ARRAY_SIZE(pte_bits), + .bits = pxd_bits, + .num = ARRAY_SIZE(pxd_bits), + .size = PMD_SIZE, }, { /* pte */ .name = "PTE", .bits = pte_bits, .num = ARRAY_SIZE(pte_bits), + .size = PAGE_SIZE }, }; @@ -251,10 +342,27 @@ static void note_page(struct ptdump_state *pt_st, unsigned long addr, int level, note_prot_wx(st, addr); } - pt_dump_seq_printf(st->seq, "0x%016lx-0x%016lx ", - st->start_address, addr); + /* + * Non-leaf entries use a fixed size for their range + * specification, whereas leaf entries are grouped by + * attributes and may not have a range larger than the type + * specifier. + */ + if (st->start_address == addr) { + if (check_add_overflow(addr, pg_level[st->level].size, + &delta)) + delta = ULONG_MAX - addr + 1; + else + delta = pg_level[st->level].size; + pt_dump_seq_printf(st->seq, "0x%016lx-0x%016lx ", + addr, addr + delta); + } else { + delta = (addr - st->start_address); + pt_dump_seq_printf(st->seq, "0x%016lx-0x%016lx ", + st->start_address, addr); + } - delta = (addr - st->start_address) >> 10; + delta >>= 10; while (!(delta & 1023) && unit[1]) { delta >>= 10; unit++;