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[198.137.202.136]) by mx.google.com with ESMTPS id p13-v6si10862734pgj.399.2018.10.15.08.10.45 for (version=TLS1_2 cipher=ECDHE-RSA-CHACHA20-POLY1305 bits=256/256); Mon, 15 Oct 2018 08:10:45 -0700 (PDT) Received-SPF: pass (google.com: domain of tipbot@zytor.com designates 198.137.202.136 as permitted sender) client-ip=198.137.202.136; Authentication-Results: mx.google.com; spf=pass (google.com: domain of tipbot@zytor.com designates 198.137.202.136 as permitted sender) smtp.mailfrom=tipbot@zytor.com Received: from terminus.zytor.com (localhost [127.0.0.1]) by terminus.zytor.com (8.15.2/8.15.2) with ESMTPS id w9FF9tYh3671981 (version=TLSv1.2 cipher=ECDHE-RSA-AES256-GCM-SHA384 bits=256 verify=NO); Mon, 15 Oct 2018 08:09:55 -0700 Received: (from tipbot@localhost) by terminus.zytor.com (8.15.2/8.15.2/Submit) id w9FF9rkr3671975; Mon, 15 Oct 2018 08:09:53 -0700 Date: Mon, 15 Oct 2018 08:09:53 -0700 X-Authentication-Warning: terminus.zytor.com: tipbot set sender to tipbot@zytor.com using -f From: tip-bot for Jan Kiszka Message-ID: Cc: jpoimboe@redhat.com, dave.hansen@intel.com, torvalds@linux-foundation.org, jan.kiszka@siemens.com, dvlasenk@redhat.com, bp@suse.de, linux-mm@kvack.org, David.Laight@aculab.com, linux-kernel@vger.kernel.org, luto@kernel.org, jgross@suse.com, hpa@zytor.com, brgerst@gmail.com, eduval@amazon.com, gregkh@linuxfoundation.org, jroedel@suse.de, tglx@linutronix.de, peterz@infradead.org, mingo@kernel.org, will.deacon@arm.com, x86@kernel.org, jkosina@suse.cz, boris.ostrovsky@oracle.com, aarcange@redhat.com Reply-To: aarcange@redhat.com, x86@kernel.org, jkosina@suse.cz, boris.ostrovsky@oracle.com, mingo@kernel.org, peterz@infradead.org, will.deacon@arm.com, gregkh@linuxfoundation.org, jroedel@suse.de, tglx@linutronix.de, luto@kernel.org, jgross@suse.com, brgerst@gmail.com, eduval@amazon.com, hpa@zytor.com, linux-kernel@vger.kernel.org, dvlasenk@redhat.com, bp@suse.de, jan.kiszka@siemens.com, David.Laight@aculab.com, linux-mm@kvack.org, dave.hansen@intel.com, jpoimboe@redhat.com, torvalds@linux-foundation.org In-Reply-To: References: To: linux-tip-commits@vger.kernel.org Subject: [tip:x86/urgent] x86/entry/32: Clear the CS high bits Git-Commit-ID: 8cad6c58c9effb59b830bcf0103d8267ad2e312d X-Mailer: tip-git-log-daemon Robot-ID: Robot-Unsubscribe: Contact to get blacklisted from these emails MIME-Version: 1.0 Content-Disposition: inline X-Bogosity: Ham, tests=bogofilter, spamicity=0.000000, version=1.2.4 Sender: owner-linux-mm@kvack.org Precedence: bulk X-Loop: owner-majordomo@kvack.org List-ID: X-Virus-Scanned: ClamAV using ClamSMTP Commit-ID: 8cad6c58c9effb59b830bcf0103d8267ad2e312d Gitweb: https://git.kernel.org/tip/8cad6c58c9effb59b830bcf0103d8267ad2e312d Author: Jan Kiszka AuthorDate: Mon, 15 Oct 2018 16:09:29 +0200 Committer: Borislav Petkov CommitDate: Mon, 15 Oct 2018 16:54:28 +0200 x86/entry/32: Clear the CS high bits Even if not on an entry stack, the CS's high bits must be initialized because they are unconditionally evaluated in PARANOID_EXIT_TO_KERNEL_MODE. Failing to do so broke the boot on Galileo Gen2 and IOT2000 boards. [ bp: Make the commit message tone passive and impartial. ] Fixes: b92a165df17e ("x86/entry/32: Handle Entry from Kernel-Mode on Entry-Stack") Signed-off-by: Jan Kiszka Signed-off-by: Borislav Petkov Reviewed-by: Joerg Roedel Acked-by: Joerg Roedel CC: "H. Peter Anvin" CC: Andrea Arcangeli CC: Andy Lutomirski CC: Boris Ostrovsky CC: Brian Gerst CC: Dave Hansen CC: David Laight CC: Denys Vlasenko CC: Eduardo Valentin CC: Greg KH CC: Ingo Molnar CC: Jiri Kosina CC: Josh Poimboeuf CC: Juergen Gross CC: Linus Torvalds CC: Peter Zijlstra CC: Thomas Gleixner CC: Will Deacon CC: aliguori@amazon.com CC: daniel.gruss@iaik.tugraz.at CC: hughd@google.com CC: keescook@google.com CC: linux-mm CC: x86-ml Link: http://lkml.kernel.org/r/f271c747-1714-5a5b-a71f-ae189a093b8d@siemens.com --- arch/x86/entry/entry_32.S | 13 +++++++------ 1 file changed, 7 insertions(+), 6 deletions(-) diff --git a/arch/x86/entry/entry_32.S b/arch/x86/entry/entry_32.S index 2767c625a52c..fbbf1ba57ec6 100644 --- a/arch/x86/entry/entry_32.S +++ b/arch/x86/entry/entry_32.S @@ -389,6 +389,13 @@ * that register for the time this macro runs */ + /* + * The high bits of the CS dword (__csh) are used for + * CS_FROM_ENTRY_STACK and CS_FROM_USER_CR3. Clear them in case + * hardware didn't do this for us. + */ + andl $(0x0000ffff), PT_CS(%esp) + /* Are we on the entry stack? Bail out if not! */ movl PER_CPU_VAR(cpu_entry_area), %ecx addl $CPU_ENTRY_AREA_entry_stack + SIZEOF_entry_stack, %ecx @@ -407,12 +414,6 @@ /* Load top of task-stack into %edi */ movl TSS_entry2task_stack(%edi), %edi - /* - * Clear unused upper bits of the dword containing the word-sized CS - * slot in pt_regs in case hardware didn't clear it for us. - */ - andl $(0x0000ffff), PT_CS(%esp) - /* Special case - entry from kernel mode via entry stack */ #ifdef CONFIG_VM86 movl PT_EFLAGS(%esp), %ecx # mix EFLAGS and CS