[0/3] Fix sdhci-of-esdhc DMA coherency

Message

Russell King (Oracle) Sept. 22, 2019, 10:23 a.m. UTC

Hi,

The following patch set is a result of looking at the ADMA errors
observed on SolidRun's LX2160A board, caused by coherency mismatch
between DT and hardware.

The first patch improves the debugging by dumping the ADMA table
using the DMA address, which can be compared with the DMA address
reported in the register dump.  It also prints the interrupt status
that we read, whereas the register dump contains the _cleared_
interrupt status.

The second patch modifies sdhci-of-esdhc to set the DMA snoop bit
depending on whether DT marks the device as coherent or not.  With
this patch applied, driver will now set the hardware to match the
contents of DT, rather than always DMA snooping.  As explained by
Robin, if the hardware snoops the CPU caches, but the DMA API layer
does not expect this, the hardware can read stale data.  The hardware
state and the DMA API must always agree wrt this, for the sake of
data integrity.  Mismatch risks substantial filesystem corruption.

The third patch marks the LX2160A esdhc devices as dma-coherent.
Other users of the driver are not touched; I do not have the
information to know whether DMA snooping (coherency) is available
on other SoCs using this driver.  However, given the risk of
filesystem corruption, it is important no matter what that the
DMA API layer and the hardware agree - even if it means defaulting
to being non-coherent.

 arch/arm64/boot/dts/freescale/fsl-lx2160a.dtsi |  2 ++
 drivers/mmc/host/sdhci-of-esdhc.c              |  7 ++++++-
 drivers/mmc/host/sdhci.c                       | 15 ++++++++++-----
 3 files changed, 18 insertions(+), 6 deletions(-)