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sdhci-s3c: support non-standard clock setting for c210

Message ID 005101cb4a88$7283d080$578b7180$%kim@samsung.com (mailing list archive)
State Superseded, archived
Headers show

Commit Message

Kim Kukjin Sept. 2, 2010, 10:20 a.m. UTC
None
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Patch

diff --git a/drivers/mmc/host/sdhci-s3c.c b/drivers/mmc/host/sdhci-s3c.c
index 71ad416..1ac2f36 100644
--- a/drivers/mmc/host/sdhci-s3c.c
+++ b/drivers/mmc/host/sdhci-s3c.c
@@ -96,6 +96,11 @@  static unsigned int sdhci_s3c_get_max_clk(struct
sdhci_host *host)
 	unsigned int rate, max;
 	int clk;
 
+	/* There is only one clock source(sclk) if there is no clock divider
+	 * in the host controller */
+	if(host->quirks & SDHCI_QUIRK_BROKEN_CLOCK_DIVIDER)
+		return clk_round_rate(ourhost->clk_bus[ourhost->cur_clk],
UINT_MAX);
+
 	/* note, a reset will reset the clock source */