From patchwork Tue Oct 22 08:24:58 2013 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: "Shen, Jackey" X-Patchwork-Id: 3081351 Return-Path: X-Original-To: patchwork-linux-mmc@patchwork.kernel.org Delivered-To: patchwork-parsemail@patchwork2.web.kernel.org Received: from mail.kernel.org (mail.kernel.org [198.145.19.201]) by patchwork2.web.kernel.org (Postfix) with ESMTP id 945B2BF924 for ; Tue, 22 Oct 2013 08:25:14 +0000 (UTC) Received: from mail.kernel.org (localhost [127.0.0.1]) by mail.kernel.org (Postfix) with ESMTP id 80461203FB for ; Tue, 22 Oct 2013 08:25:13 +0000 (UTC) Received: from vger.kernel.org (vger.kernel.org [209.132.180.67]) by mail.kernel.org (Postfix) with ESMTP id 6352620377 for ; Tue, 22 Oct 2013 08:25:12 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1753508Ab3JVIZK (ORCPT ); Tue, 22 Oct 2013 04:25:10 -0400 Received: from va3ehsobe005.messaging.microsoft.com ([216.32.180.31]:53985 "EHLO va3outboundpool.messaging.microsoft.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1753407Ab3JVIZI convert rfc822-to-8bit (ORCPT ); Tue, 22 Oct 2013 04:25:08 -0400 Received: from mail204-va3-R.bigfish.com (10.7.14.234) by VA3EHSOBE009.bigfish.com (10.7.40.29) with Microsoft SMTP Server id 14.1.225.22; Tue, 22 Oct 2013 08:25:07 +0000 Received: from mail204-va3 (localhost [127.0.0.1]) by mail204-va3-R.bigfish.com (Postfix) with ESMTP id BBB0CB20187; Tue, 22 Oct 2013 08:25:07 +0000 (UTC) X-Forefront-Antispam-Report: CIP:165.204.84.222; KIP:(null); UIP:(null); IPV:NLI; H:atltwp02.amd.com; RD:none; EFVD:NLI X-SpamScore: -3 X-BigFish: VPS-3(zz9371I542I4015Izz1f42h208ch1ee6h1de0h1fdah2073h1202h1e76h1d1ah1d2ah1fc6hzz1de098h8275dh1de097h8275bhz2dh839h944hd25hf0ah1220h1288h12a5h12a9h12bdh137ah13b6h1441h14ddh1504h1537h153bh15d0h162dh1631h1758h18e1h1946h19b5h1ad9h1b0ah1d0ch1d2eh1d3fh1dfeh1dffh1e1dh1fe8h1ff5h1155h) Received: from mail204-va3 (localhost.localdomain [127.0.0.1]) by mail204-va3 (MessageSwitch) id 1382430305889758_4643; Tue, 22 Oct 2013 08:25:05 +0000 (UTC) Received: from VA3EHSMHS014.bigfish.com (unknown [10.7.14.239]) by mail204-va3.bigfish.com (Postfix) with ESMTP id CCB84780040; Tue, 22 Oct 2013 08:25:05 +0000 (UTC) Received: from atltwp02.amd.com (165.204.84.222) by VA3EHSMHS014.bigfish.com (10.7.99.24) with Microsoft SMTP Server id 14.16.227.3; Tue, 22 Oct 2013 08:25:05 +0000 X-WSS-ID: 0MV29ZH-08-38V-02 X-M-MSG: Received: from satlvexedge02.amd.com (satlvexedge02.amd.com [10.177.96.29]) (using TLSv1 with cipher AES128-SHA (128/128 bits)) (No client certificate requested) by atltwp02.amd.com (Axway MailGate 5.2.1) with ESMTPS id 2F59DD16022; Tue, 22 Oct 2013 03:23:40 -0500 (CDT) Received: from SATLEXDAG04.amd.com (10.181.40.9) by SATLVEXEDGE02.amd.com (10.177.96.29) with Microsoft SMTP Server (TLS) id 14.2.328.9; Tue, 22 Oct 2013 03:25:15 -0500 Received: from SCYBEXDAG03.amd.com (10.34.11.13) by satlexdag04.amd.com (10.181.40.9) with Microsoft SMTP Server (TLS) id 14.2.328.9; Tue, 22 Oct 2013 04:25:03 -0400 Received: from SCYBEXDAG04.amd.com ([169.254.4.245]) by SCYBEXDAG03.amd.com ([169.254.3.92]) with mapi id 14.02.0328.009; Tue, 22 Oct 2013 16:25:00 +0800 From: "Shen, Jackey" To: Chris Ball CC: "Shen, Jackey" , "linux-mmc@vger.kernel.org" Subject: RE: [PATCH] mmc: sdhci-pci: identify correct base addresses for slots Thread-Topic: [PATCH] mmc: sdhci-pci: identify correct base addresses for slots Thread-Index: AQHOdjzX0/XDNq8vK0emqgoCqgQnB5oBE4UA Date: Tue, 22 Oct 2013 08:24:58 +0000 Message-ID: <0C8FBB70FF40A94D98BE847F9C171A9803ACEAFE@SCYBEXDAG04.amd.com> References: <1372670535-2778-1-git-send-email-jackey.shen@amd.com> In-Reply-To: <1372670535-2778-1-git-send-email-jackey.shen@amd.com> Accept-Language: en-US Content-Language: en-US X-MS-Has-Attach: X-MS-TNEF-Correlator: x-originating-ip: [10.237.74.112] MIME-Version: 1.0 X-OriginatorOrg: amd.com X-FOPE-CONNECTOR: Id%0$Dn%*$RO%0$TLS%0$FQDN%$TlsDn% Sender: linux-mmc-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-mmc@vger.kernel.org X-Spam-Status: No, score=-7.3 required=5.0 tests=BAYES_00, RCVD_IN_DNSWL_HI, RP_MATCHES_RCVD, UNPARSEABLE_RELAY autolearn=ham version=3.3.1 X-Spam-Checker-Version: SpamAssassin 3.3.1 (2010-03-16) on mail.kernel.org X-Virus-Scanned: ClamAV using ClamSMTP Hi Chris, Do you have any comments on this patch? Thanks, Jackey -----Original Message----- From: Jackey Shen [mailto:jackey.shen@amd.com] Sent: Monday, July 01, 2013 5:22 PM To: linux-mmc@vger.kernel.org Cc: Shen, Jackey Subject: [PATCH] mmc: sdhci-pci: identify correct base addresses for slots A PCI Based SD Host Controller can support up to a total of six SD Slots, and the base addresses are specified by Slot Information Register of its PCI header. Please refer to C.3.3 of SD Host Controller Standard Specification Version 3.0. Signed-off-by: Jackey Shen --- drivers/mmc/host/sdhci-pci.c | 7 ++++--- 1 file changed, 4 insertions(+), 3 deletions(-) diff --git a/drivers/mmc/host/sdhci-pci.c b/drivers/mmc/host/sdhci-pci.c index d7d6bc8..3a84e95 100644 --- a/drivers/mmc/host/sdhci-pci.c +++ b/drivers/mmc/host/sdhci-pci.c @@ -50,7 +50,8 @@ #define PCI_SLOT_INFO_SLOTS(x) ((x >> 4) & 7) #define PCI_SLOT_INFO_FIRST_BAR_MASK 0x07 -#define MAX_SLOTS 8 +#define MAX_SLOTS 6 +#define MAX_BARS 6 struct sdhci_pci_chip; struct sdhci_pci_slot; @@ -1282,7 +1283,7 @@ static struct sdhci_pci_slot *sdhci_pci_probe_slot( { struct sdhci_pci_slot *slot; struct sdhci_host *host; - int ret, bar = first_bar + slotno; + int ret, bar = (first_bar + slotno) % MAX_BARS; if (!(pci_resource_flags(pdev, bar) & IORESOURCE_MEM)) { dev_err(&pdev->dev, "BAR %d is not iomem. Aborting.\n", bar); @@ -1481,7 +1482,7 @@ static int sdhci_pci_probe(struct pci_dev *pdev, first_bar &= PCI_SLOT_INFO_FIRST_BAR_MASK; - if (first_bar > 5) { + if (first_bar > MAX_BARS - 1) { dev_err(&pdev->dev, "Invalid first BAR. Aborting.\n"); return -ENODEV; }