From patchwork Wed Jun 1 11:15:22 2011 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Balaji T K X-Patchwork-Id: 838622 Received: from vger.kernel.org (vger.kernel.org [209.132.180.67]) by demeter1.kernel.org (8.14.4/8.14.3) with ESMTP id p51BHNVG001875 for ; Wed, 1 Jun 2011 11:17:52 GMT Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1161135Ab1FALRU (ORCPT ); Wed, 1 Jun 2011 07:17:20 -0400 Received: from arroyo.ext.ti.com ([192.94.94.40]:58178 "EHLO arroyo.ext.ti.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1161136Ab1FALRS (ORCPT ); Wed, 1 Jun 2011 07:17:18 -0400 Received: from dbdp20.itg.ti.com ([172.24.170.38]) by arroyo.ext.ti.com (8.13.7/8.13.7) with ESMTP id p51BH3HA008315 (version=TLSv1/SSLv3 cipher=DHE-RSA-AES256-SHA bits=256 verify=NO); Wed, 1 Jun 2011 06:17:05 -0500 Received: from dbde70.ent.ti.com (localhost [127.0.0.1]) by dbdp20.itg.ti.com (8.13.8/8.13.8) with ESMTP id p51BH1Ts004853; Wed, 1 Jun 2011 16:47:01 +0530 (IST) Received: from dbdp31.itg.ti.com (172.24.170.98) by DBDE70.ent.ti.com (172.24.170.148) with Microsoft SMTP Server id 8.3.106.1; Wed, 1 Jun 2011 16:47:00 +0530 Received: from localhost.localdomain (a0393241pc.india.ti.com [172.24.136.78]) by dbdp31.itg.ti.com (8.13.8/8.13.8) with ESMTP id p51BGvAA003632; Wed, 1 Jun 2011 16:47:00 +0530 (IST) From: Balaji T K To: , , CC: , , , Balaji T K Subject: [PATCH v2 1/2] ARM: OMAP4: MMC: increase delay for pbias Date: Wed, 1 Jun 2011 16:45:22 +0530 Message-ID: <1306926923-3398-2-git-send-email-balajitk@ti.com> X-Mailer: git-send-email 1.7.0.4 In-Reply-To: <1306926923-3398-1-git-send-email-balajitk@ti.com> References: <1306926923-3398-1-git-send-email-balajitk@ti.com> MIME-Version: 1.0 Sender: linux-mmc-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-mmc@vger.kernel.org X-Greylist: IP, sender and recipient auto-whitelisted, not delayed by milter-greylist-4.2.6 (demeter1.kernel.org [140.211.167.41]); Wed, 01 Jun 2011 11:17:53 +0000 (UTC) 4 micro seconds is not enough for PBIAS if MMC regulator is enabled from MMC regulator OFF. Increase the delay for PBIAS to stabilize. Wait for PBIAS and timeout if not. Resolves MMC/SD failure on OMAP4 "Pbias Voltage is not same as LDO" Signed-off-by: Balaji T K Acked-by: Kishore Kadiyala --- v2: replace usleep by usleep_range arch/arm/mach-omap2/hsmmc.c | 13 ++++++++++--- 1 files changed, 10 insertions(+), 3 deletions(-) diff --git a/arch/arm/mach-omap2/hsmmc.c b/arch/arm/mach-omap2/hsmmc.c index b2f30be..24f25c7 100644 --- a/arch/arm/mach-omap2/hsmmc.c +++ b/arch/arm/mach-omap2/hsmmc.c @@ -145,6 +145,7 @@ static void omap4_hsmmc1_after_set_reg(struct device *dev, int slot, int power_on, int vdd) { u32 reg; + unsigned long timeout; if (power_on) { reg = omap4_ctrl_pad_readl(control_pbias_offset); @@ -157,9 +158,15 @@ static void omap4_hsmmc1_after_set_reg(struct device *dev, int slot, OMAP4_MMC1_PWRDNZ_MASK | OMAP4_USBC1_ICUSB_PWRDNZ_MASK); omap4_ctrl_pad_writel(reg, control_pbias_offset); - /* 4 microsec delay for comparator to generate an error*/ - udelay(4); - reg = omap4_ctrl_pad_readl(control_pbias_offset); + + timeout = jiffies + msecs_to_jiffies(5); + do { + reg = omap4_ctrl_pad_readl(control_pbias_offset); + if (!(reg & OMAP4_MMC1_PBIASLITE_VMODE_ERROR_MASK)) + break; + usleep_range(100, 200); + } while (!time_after(jiffies, timeout)); + if (reg & OMAP4_MMC1_PBIASLITE_VMODE_ERROR_MASK) { pr_err("Pbias Voltage is not same as LDO\n"); /* Caution : On VMODE_ERROR Power Down MMC IO */