From patchwork Fri Jul 22 10:15:16 2011 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Zang Roy-R61911 X-Patchwork-Id: 998492 Received: from vger.kernel.org (vger.kernel.org [209.132.180.67]) by demeter1.kernel.org (8.14.4/8.14.4) with ESMTP id p6M9ZwDt022038 for ; Fri, 22 Jul 2011 09:35:59 GMT Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1753555Ab1GVJf6 (ORCPT ); Fri, 22 Jul 2011 05:35:58 -0400 Received: from ch1ehsobe005.messaging.microsoft.com ([216.32.181.185]:28145 "EHLO ch1outboundpool.messaging.microsoft.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1753523Ab1GVJf5 (ORCPT ); Fri, 22 Jul 2011 05:35:57 -0400 Received: from mail215-ch1-R.bigfish.com (216.32.181.174) by CH1EHSOBE015.bigfish.com (10.43.70.65) with Microsoft SMTP Server id 14.1.225.22; Fri, 22 Jul 2011 09:35:56 +0000 Received: from mail215-ch1 (localhost.localdomain [127.0.0.1]) by mail215-ch1-R.bigfish.com (Postfix) with ESMTP id 0152F1280315; Fri, 22 Jul 2011 09:35:56 +0000 (UTC) X-SpamScore: 0 X-BigFish: VS0(zzzz1202hzz8275bh8275dhz2dh2a8h668h839h62h) X-Spam-TCS-SCL: 1:0 X-Forefront-Antispam-Report: CIP:70.37.183.190; KIP:(null); UIP:(null); IPVD:NLI; H:mail.freescale.net; RD:none; EFVD:NLI Received: from mail215-ch1 (localhost.localdomain [127.0.0.1]) by mail215-ch1 (MessageSwitch) id 1311327355834693_17993; Fri, 22 Jul 2011 09:35:55 +0000 (UTC) Received: from CH1EHSMHS015.bigfish.com (snatpool1.int.messaging.microsoft.com [10.43.68.247]) by mail215-ch1.bigfish.com (Postfix) with ESMTP id C5DC9A6004B; Fri, 22 Jul 2011 09:35:55 +0000 (UTC) Received: from mail.freescale.net (70.37.183.190) by CH1EHSMHS015.bigfish.com (10.43.70.15) with Microsoft SMTP Server (TLS) id 14.1.225.22; Fri, 22 Jul 2011 09:35:55 +0000 Received: from az33smr01.freescale.net (10.64.34.199) by 039-SN1MMR1-003.039d.mgd.msft.net (10.84.1.16) with Microsoft SMTP Server id 14.1.289.8; Fri, 22 Jul 2011 04:35:54 -0500 Received: from localhost.localdomain (udp144289uds.ap.freescale.net [10.193.20.43]) by az33smr01.freescale.net (8.13.1/8.13.0) with ESMTP id p6M9ZoOe024558; Fri, 22 Jul 2011 04:35:51 -0500 (CDT) From: Roy Zang To: CC: , , , Xu lei , Roy Zang , Kumar Gala Subject: [PATCH 1/2 v2] eSDHC: Access Freescale eSDHC registers by 32-bit Date: Fri, 22 Jul 2011 18:15:16 +0800 Message-ID: <1311329717-13954-1-git-send-email-tie-fei.zang@freescale.com> X-Mailer: git-send-email 1.6.0.6 MIME-Version: 1.0 X-OriginatorOrg: freescale.com Sender: linux-mmc-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-mmc@vger.kernel.org X-Greylist: IP, sender and recipient auto-whitelisted, not delayed by milter-greylist-4.2.6 (demeter1.kernel.org [140.211.167.41]); Fri, 22 Jul 2011 09:35:59 +0000 (UTC) From: Xu lei For Freescale eSDHC registers only support 32-bit accesses, this patch ensure that all Freescale eSDHC register accesses are 32-bit. Signed-off-by: Xu lei Signed-off-by: Roy Zang Signed-off-by: Kumar Gala --- this patch set replaces previous patches: https://patchwork.kernel.org/patch/943332/ https://patchwork.kernel.org/patch/943342/ https://patchwork.kernel.org/patch/943322/ The last one is discarded according to the comment from Anton. just resend with the new patch set. no change for this patch comparing to previous version. drivers/mmc/host/sdhci-of-esdhc.c | 18 ++++++++++++++---- 1 files changed, 14 insertions(+), 4 deletions(-) diff --git a/drivers/mmc/host/sdhci-of-esdhc.c b/drivers/mmc/host/sdhci-of-esdhc.c index ba40d6d..c9a8519 100644 --- a/drivers/mmc/host/sdhci-of-esdhc.c +++ b/drivers/mmc/host/sdhci-of-esdhc.c @@ -1,7 +1,7 @@ /* * Freescale eSDHC controller driver. * - * Copyright (c) 2007 Freescale Semiconductor, Inc. + * Copyright (c) 2007, 2010 Freescale Semiconductor, Inc. * Copyright (c) 2009 MontaVista Software, Inc. * * Authors: Xiaobo Xie @@ -23,11 +23,21 @@ static u16 esdhc_readw(struct sdhci_host *host, int reg) { u16 ret; + int base = reg & ~0x3; + int shift = (reg & 0x2) * 8; if (unlikely(reg == SDHCI_HOST_VERSION)) - ret = in_be16(host->ioaddr + reg); + ret = in_be32(host->ioaddr + base) & 0xffff; else - ret = sdhci_be32bs_readw(host, reg); + ret = (in_be32(host->ioaddr + base) >> shift) & 0xffff; + return ret; +} + +static u8 esdhc_readb(struct sdhci_host *host, int reg) +{ + int base = reg & ~0x3; + int shift = (reg & 0x3) * 8; + u8 ret = (in_be32(host->ioaddr + base) >> shift) & 0xff; return ret; } @@ -79,7 +89,7 @@ struct sdhci_of_data sdhci_esdhc = { .ops = { .read_l = sdhci_be32bs_readl, .read_w = esdhc_readw, - .read_b = sdhci_be32bs_readb, + .read_b = esdhc_readb, .write_l = sdhci_be32bs_writel, .write_w = esdhc_writew, .write_b = esdhc_writeb,