From patchwork Mon Sep 24 08:15:53 2012 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Kevin Liu X-Patchwork-Id: 1496611 Return-Path: X-Original-To: patchwork-linux-mmc@patchwork.kernel.org Delivered-To: patchwork-process-083081@patchwork2.kernel.org Received: from vger.kernel.org (vger.kernel.org [209.132.180.67]) by patchwork2.kernel.org (Postfix) with ESMTP id 56005DF280 for ; Mon, 24 Sep 2012 08:25:01 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1755399Ab2IXIY7 (ORCPT ); Mon, 24 Sep 2012 04:24:59 -0400 Received: from na3sys009aog101.obsmtp.com ([74.125.149.67]:56362 "EHLO na3sys009aog101.obsmtp.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1755389Ab2IXIY6 (ORCPT ); Mon, 24 Sep 2012 04:24:58 -0400 Received: from MSI-MTA.marvell.com ([65.219.4.132]) (using TLSv1) by na3sys009aob101.postini.com ([74.125.148.12]) with SMTP ID DSNKUGAY186P5ZTJGLtpX7v/zAhMGVYLNk6m@postini.com; Mon, 24 Sep 2012 01:24:58 PDT Received: from maili.marvell.com ([10.68.76.210]) by MSI-MTA.marvell.com with Microsoft SMTPSVC(6.0.3790.3959); Mon, 24 Sep 2012 01:21:19 -0700 Received: from localhost.localdomain (unknown [10.38.36.240]) by maili.marvell.com (Postfix) with ESMTP id 637924E51A; Mon, 24 Sep 2012 01:21:15 -0700 (PDT) From: Kevin Liu To: linux-mmc@vger.kernel.org, cjb@laptop.org, pierre@ossman.eu Cc: hzhuang1@marvell.com, cxie4@marvell.com, prakity@marvell.com, kliu5@marvell.com Subject: [PATCH v2 3/8] mmc: sdhci: refine code for sd clock disable/enable in set ios Date: Mon, 24 Sep 2012 16:15:53 +0800 Message-Id: <1348474558-23088-4-git-send-email-keyuan.liu@gmail.com> X-Mailer: git-send-email 1.7.0.4 In-Reply-To: <1348474558-23088-1-git-send-email-keyuan.liu@gmail.com> References: <1348474558-23088-1-git-send-email-keyuan.liu@gmail.com> X-OriginalArrivalTime: 24 Sep 2012 08:21:19.0899 (UTC) FILETIME=[934B16B0:01CD9A2D] Sender: linux-mmc-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-mmc@vger.kernel.org From: Kevin Liu With preset value enabled, there are two continuous times of sd clock disable/enable. They can be combined into one to save time and make code cleaner. Signed-off-by: Kevin Liu --- drivers/mmc/host/sdhci.c | 29 +++++++++-------------------- 1 files changed, 9 insertions(+), 20 deletions(-) diff --git a/drivers/mmc/host/sdhci.c b/drivers/mmc/host/sdhci.c index f50efa6..32dd505 100644 --- a/drivers/mmc/host/sdhci.c +++ b/drivers/mmc/host/sdhci.c @@ -1449,33 +1449,22 @@ static void sdhci_do_set_ios(struct sdhci_host *host, struct mmc_ios *ios) ctrl_2 |= SDHCI_CTRL_DRV_TYPE_C; sdhci_writew(host, ctrl_2, SDHCI_HOST_CONTROL2); - } else { - /* - * According to SDHC Spec v3.00, if the Preset Value - * Enable in the Host Control 2 register is set, we - * need to reset SD Clock Enable before changing High - * Speed Enable to avoid generating clock gliches. - */ - - /* Reset SD Clock Enable */ - clk = sdhci_readw(host, SDHCI_CLOCK_CONTROL); - clk &= ~SDHCI_CLOCK_CARD_EN; - sdhci_writew(host, clk, SDHCI_CLOCK_CONTROL); - - sdhci_writeb(host, ctrl, SDHCI_HOST_CONTROL); - - /* Re-enable SD Clock */ - clock = host->clock; - host->clock = 0; - sdhci_set_clock(host, clock); } - /* Reset SD Clock Enable */ clk = sdhci_readw(host, SDHCI_CLOCK_CONTROL); clk &= ~SDHCI_CLOCK_CARD_EN; sdhci_writew(host, clk, SDHCI_CLOCK_CONTROL); + /* + * According to SDHC Spec v3.00, if the Preset Value + * Enable in the Host Control 2 register is set, we + * need to reset SD Clock Enable before changing High + * Speed Enable to avoid generating clock gliches. + */ + if (ctrl_2 & SDHCI_CTRL_PRESET_VAL_ENABLE) + sdhci_writeb(host, ctrl, SDHCI_HOST_CONTROL); + if (host->ops->set_uhs_signaling) host->ops->set_uhs_signaling(host, ios->timing); else {