From patchwork Wed Sep 26 11:38:46 2012 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Kevin Liu X-Patchwork-Id: 1509291 Return-Path: X-Original-To: patchwork-linux-mmc@patchwork.kernel.org Delivered-To: patchwork-process-083081@patchwork1.kernel.org Received: from vger.kernel.org (vger.kernel.org [209.132.180.67]) by patchwork1.kernel.org (Postfix) with ESMTP id 694553FC71 for ; Wed, 26 Sep 2012 11:44:43 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1755064Ab2IZLom (ORCPT ); Wed, 26 Sep 2012 07:44:42 -0400 Received: from na3sys009aog132.obsmtp.com ([74.125.149.250]:34405 "EHLO na3sys009aog132.obsmtp.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1755646Ab2IZLom (ORCPT ); Wed, 26 Sep 2012 07:44:42 -0400 Received: from MSI-MTA.marvell.com ([65.219.4.132]) (using TLSv1) by na3sys009aob132.postini.com ([74.125.148.12]) with SMTP ID DSNKUGLqpRE6ylgC0rfbEzhATXFGdR300fll@postini.com; Wed, 26 Sep 2012 04:44:42 PDT Received: from maili.marvell.com ([10.68.76.210]) by MSI-MTA.marvell.com with Microsoft SMTPSVC(6.0.3790.3959); Wed, 26 Sep 2012 04:44:10 -0700 Received: from localhost.localdomain (unknown [10.38.36.240]) by maili.marvell.com (Postfix) with ESMTP id 7A3D04E510; Wed, 26 Sep 2012 04:44:09 -0700 (PDT) From: Kevin Liu To: linux-mmc@vger.kernel.org, cjb@laptop.org, pierre@ossman.eu, ulf.hansson@linaro.org, zgao6@marvell.com Cc: hzhuang1@marvell.com, cxie4@marvell.com, prakity@marvell.com, kliu5@marvell.com Subject: [PATCH v4 14/15] mmc: sdhci: fix the bug that DDR50 can't work for emmc Date: Wed, 26 Sep 2012 19:38:46 +0800 Message-Id: <1348659527-4200-15-git-send-email-keyuan.liu@gmail.com> X-Mailer: git-send-email 1.7.0.4 In-Reply-To: <1348659527-4200-1-git-send-email-keyuan.liu@gmail.com> References: <1348659527-4200-1-git-send-email-keyuan.liu@gmail.com> X-OriginalArrivalTime: 26 Sep 2012 11:44:10.0721 (UTC) FILETIME=[3E7EA510:01CD9BDC] Sender: linux-mmc-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-mmc@vger.kernel.org From: Kevin Liu Host controller must enable 1.8v signal for UHS modes. Otherwise UHS modes won't take effect. But mmc core does NOT switch to 1.8v for DDR50 mode. So enable the 1.8v signal for mmc DDR50 mode in host driver. Signed-off-by: Kevin Liu --- drivers/mmc/host/sdhci.c | 9 ++++++++- 1 files changed, 8 insertions(+), 1 deletions(-) diff --git a/drivers/mmc/host/sdhci.c b/drivers/mmc/host/sdhci.c index 50e7a54..e3de041 100644 --- a/drivers/mmc/host/sdhci.c +++ b/drivers/mmc/host/sdhci.c @@ -1529,8 +1529,15 @@ static void sdhci_do_set_ios(struct sdhci_host *host, struct mmc_ios *ios) ctrl_2 |= SDHCI_CTRL_UHS_SDR50; else if (ios->timing == MMC_TIMING_UHS_SDR104) ctrl_2 |= SDHCI_CTRL_UHS_SDR104; - else if (ios->timing == MMC_TIMING_UHS_DDR50) + else if (ios->timing == MMC_TIMING_UHS_DDR50) { + struct mmc_card *card; + ctrl_2 |= SDHCI_CTRL_UHS_DDR50; + card = container_of(&(host->mmc), + struct mmc_card, host); + if (mmc_card_mmc(card)) + ctrl_2 |= SDHCI_CTRL_VDD_180; + } sdhci_writew(host, ctrl_2, SDHCI_HOST_CONTROL2); } if (!(host->quirks2 & SDHCI_QUIRK2_PRESET_VALUE_BROKEN) &&