From patchwork Fri Oct 5 15:33:40 2012 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Balaji T K X-Patchwork-Id: 1554021 Return-Path: X-Original-To: patchwork-linux-mmc@patchwork.kernel.org Delivered-To: patchwork-process-083081@patchwork1.kernel.org Received: from vger.kernel.org (vger.kernel.org [209.132.180.67]) by patchwork1.kernel.org (Postfix) with ESMTP id 41AA53FE80 for ; Fri, 5 Oct 2012 15:34:03 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1756151Ab2JEPd7 (ORCPT ); Fri, 5 Oct 2012 11:33:59 -0400 Received: from arroyo.ext.ti.com ([192.94.94.40]:48147 "EHLO arroyo.ext.ti.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1756606Ab2JEPd5 (ORCPT ); Fri, 5 Oct 2012 11:33:57 -0400 Received: from dbdp20.itg.ti.com ([172.24.170.38]) by arroyo.ext.ti.com (8.13.7/8.13.7) with ESMTP id q95FXpf5005660; Fri, 5 Oct 2012 10:33:51 -0500 Received: from DBDE70.ent.ti.com (localhost [127.0.0.1]) by dbdp20.itg.ti.com (8.13.8/8.13.8) with ESMTP id q95FXmwI010881; Fri, 5 Oct 2012 21:03:49 +0530 (IST) Received: from dbdp33.itg.ti.com (172.24.170.252) by dbde70.ent.ti.com (172.24.170.148) with Microsoft SMTP Server id 14.1.323.3; Fri, 5 Oct 2012 21:03:48 +0530 Received: from ulaa0393241.india.ti.com (smtpvbd.itg.ti.com [172.24.170.250]) by dbdp33.itg.ti.com (8.13.8/8.13.8) with ESMTP id q95FXj1R026146; Fri, 5 Oct 2012 21:03:46 +0530 From: Balaji T K To: , CC: , Viswanath Puttagunta , Balaji T K Subject: [RFT/PATCH] mmc: core: Fix to enable DDR on MMC for non-UHS controllers Date: Fri, 5 Oct 2012 21:03:40 +0530 Message-ID: <1349451220-24484-1-git-send-email-balajitk@ti.com> X-Mailer: git-send-email 1.7.5.4 MIME-Version: 1.0 Sender: linux-mmc-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-mmc@vger.kernel.org From: Viswanath Puttagunta MMC_CAP_UHS_DDR50 is SD card feature and not eMMC feature. We don't have to check for this flag to enable DDR on MMC. Checking for MMC_CAP_1_8V_DDR host capability is sufficient. This patch is needed for OMAP4 platforms as hsmmc can support DDR with eMMC but does not support UHS speed mode for SD card. Signed-off-by: Viswanath Puttagunta Signed-off-by: Balaji T K --- drivers/mmc/core/mmc.c | 10 ++++------ 1 files changed, 4 insertions(+), 6 deletions(-) diff --git a/drivers/mmc/core/mmc.c b/drivers/mmc/core/mmc.c index 7509de1..9937c91 100644 --- a/drivers/mmc/core/mmc.c +++ b/drivers/mmc/core/mmc.c @@ -1062,14 +1062,12 @@ static int mmc_init_card(struct mmc_host *host, u32 ocr, */ if (mmc_card_highspeed(card)) { if ((card->ext_csd.card_type & EXT_CSD_CARD_TYPE_DDR_1_8V) - && ((host->caps & (MMC_CAP_1_8V_DDR | - MMC_CAP_UHS_DDR50)) - == (MMC_CAP_1_8V_DDR | MMC_CAP_UHS_DDR50))) + && (host->caps & (MMC_CAP_1_8V_DDR | + MMC_CAP_UHS_DDR50))) ddr = MMC_1_8V_DDR_MODE; else if ((card->ext_csd.card_type & EXT_CSD_CARD_TYPE_DDR_1_2V) - && ((host->caps & (MMC_CAP_1_2V_DDR | - MMC_CAP_UHS_DDR50)) - == (MMC_CAP_1_2V_DDR | MMC_CAP_UHS_DDR50))) + && (host->caps & (MMC_CAP_1_2V_DDR | + MMC_CAP_UHS_DDR50))) ddr = MMC_1_2V_DDR_MODE; }