From patchwork Tue Apr 30 14:03:51 2013 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Balaji T K X-Patchwork-Id: 2504651 Return-Path: X-Original-To: patchwork-linux-mmc@patchwork.kernel.org Delivered-To: patchwork-process-083081@patchwork1.kernel.org Received: from vger.kernel.org (vger.kernel.org [209.132.180.67]) by patchwork1.kernel.org (Postfix) with ESMTP id 4B2523FD85 for ; Tue, 30 Apr 2013 14:04:20 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1760745Ab3D3OES (ORCPT ); Tue, 30 Apr 2013 10:04:18 -0400 Received: from arroyo.ext.ti.com ([192.94.94.40]:50732 "EHLO arroyo.ext.ti.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1760712Ab3D3OEI (ORCPT ); Tue, 30 Apr 2013 10:04:08 -0400 Received: from dbdlxv05.itg.ti.com ([172.24.171.60]) by arroyo.ext.ti.com (8.13.7/8.13.7) with ESMTP id r3UE44HC006871; Tue, 30 Apr 2013 09:04:05 -0500 Received: from DBDE73.ent.ti.com (dbde73.ent.ti.com [172.24.171.98]) by dbdlxv05.itg.ti.com (8.14.3/8.13.8) with ESMTP id r3UE3ve7005936; Tue, 30 Apr 2013 09:04:03 -0500 Received: from dbdp32.itg.ti.com (172.24.170.251) by DBDE73.ent.ti.com (172.24.171.98) with Microsoft SMTP Server id 14.2.342.3; Tue, 30 Apr 2013 22:03:58 +0800 Received: from ulaa0393241.apr.dhcp.ti.com (smtpvbd.itg.ti.com [172.24.170.250]) by dbdp32.itg.ti.com (8.13.8/8.13.8) with ESMTP id r3UE3smk003935; Tue, 30 Apr 2013 19:33:58 +0530 From: Balaji T K To: , , , , CC: Balaji T K Subject: [PATCH 11/13] ARM: dts: omap4: Add omap control mmc data Date: Tue, 30 Apr 2013 19:33:51 +0530 Message-ID: <1367330633-5941-12-git-send-email-balajitk@ti.com> X-Mailer: git-send-email 1.7.5.4 In-Reply-To: <1367330633-5941-1-git-send-email-balajitk@ti.com> References: <1367330633-5941-1-git-send-email-balajitk@ti.com> MIME-Version: 1.0 Sender: linux-mmc-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-mmc@vger.kernel.org Add omap-hsmmc-control data to omap4. Update with pbias register address for configuration of pbias dual volt i/o cells in mmc1 and control_mmc1 register address for i/o strength configuration Signed-off-by: Balaji T K --- arch/arm/boot/dts/omap4.dtsi | 9 +++++++++ 1 files changed, 9 insertions(+), 0 deletions(-) diff --git a/arch/arm/boot/dts/omap4.dtsi b/arch/arm/boot/dts/omap4.dtsi index 739bb79..7f1d0c1 100644 --- a/arch/arm/boot/dts/omap4.dtsi +++ b/arch/arm/boot/dts/omap4.dtsi @@ -292,6 +292,14 @@ ti,spi-num-cs = <1>; }; + omap_control_mmc1: omap-hsmmc-control@4A100600 { + compatible = "ti,omap-hsmmc-control"; + reg = <0x4A100600 0x4>, + <0x4A100628 0x4>; + reg-names = "pbias", "mmc1"; + ctrl-type = <5>; + }; + mmc1: mmc@4809c000 { compatible = "ti,omap4-hsmmc"; reg = <0x4809c000 0x400>; @@ -299,6 +307,7 @@ ti,hwmods = "mmc1"; ti,dual-volt; ti,needs-special-reset; + ctrl-module = <&omap_control_mmc1>; }; mmc2: mmc@480b4000 {