| Message ID | 1372670535-2778-1-git-send-email-jackey.shen@amd.com (mailing list archive) |
|---|---|
| State | New, archived |
| Headers | show |
Hi Jackey, On Mon, Jul 01 2013, Jackey Shen wrote: > A PCI Based SD Host Controller can support up to a total of six SD Slots, and > the base addresses are specified by Slot Information Register of its PCI header. > Please refer to C.3.3 of SD Host Controller Standard Specification Version 3.0. Out of curiosity (and for the patch record), do you have hardware that requires this patch that you've tested it on, or is it just theoretical? Thanks, - Chris.
Hi Chris, > -----Original Message----- > From: Chris Ball [mailto:cjb@laptop.org] > Sent: Sunday, October 27, 2013 9:24 AM > To: Shen, Jackey > Cc: linux-mmc@vger.kernel.org > Subject: Re: [PATCH] mmc: sdhci-pci: identify correct base addresses for slots > > Hi Jackey, > > On Mon, Jul 01 2013, Jackey Shen wrote: > > A PCI Based SD Host Controller can support up to a total of six SD Slots, > and > > the base addresses are specified by Slot Information Register of its PCI > header. > > Please refer to C.3.3 of SD Host Controller Standard Specification Version > 3.0. > > Out of curiosity (and for the patch record), do you have hardware that > requires this patch that you've tested it on, or is it just theoretical? I just theoretically wrote this patch according to SD spec. Thanks, Jackey > > Thanks, > > - Chris. > -- > Chris Ball <cjb@laptop.org> <http://printf.net/> -- To unsubscribe from this list: send the line "unsubscribe linux-mmc" in the body of a message to majordomo@vger.kernel.org More majordomo info at http://vger.kernel.org/majordomo-info.html
diff --git a/drivers/mmc/host/sdhci-pci.c b/drivers/mmc/host/sdhci-pci.c index d7d6bc8..3a84e95 100644 --- a/drivers/mmc/host/sdhci-pci.c +++ b/drivers/mmc/host/sdhci-pci.c @@ -50,7 +50,8 @@ #define PCI_SLOT_INFO_SLOTS(x) ((x >> 4) & 7) #define PCI_SLOT_INFO_FIRST_BAR_MASK 0x07 -#define MAX_SLOTS 8 +#define MAX_SLOTS 6 +#define MAX_BARS 6 struct sdhci_pci_chip; struct sdhci_pci_slot; @@ -1282,7 +1283,7 @@ static struct sdhci_pci_slot *sdhci_pci_probe_slot( { struct sdhci_pci_slot *slot; struct sdhci_host *host; - int ret, bar = first_bar + slotno; + int ret, bar = (first_bar + slotno) % MAX_BARS; if (!(pci_resource_flags(pdev, bar) & IORESOURCE_MEM)) { dev_err(&pdev->dev, "BAR %d is not iomem. Aborting.\n", bar); @@ -1481,7 +1482,7 @@ static int sdhci_pci_probe(struct pci_dev *pdev, first_bar &= PCI_SLOT_INFO_FIRST_BAR_MASK; - if (first_bar > 5) { + if (first_bar > MAX_BARS - 1) { dev_err(&pdev->dev, "Invalid first BAR. Aborting.\n"); return -ENODEV; }
A PCI Based SD Host Controller can support up to a total of six SD Slots, and the base addresses are specified by Slot Information Register of its PCI header. Please refer to C.3.3 of SD Host Controller Standard Specification Version 3.0. Signed-off-by: Jackey Shen <jackey.shen@amd.com> --- drivers/mmc/host/sdhci-pci.c | 7 ++++--- 1 file changed, 4 insertions(+), 3 deletions(-)