From patchwork Tue Oct 15 22:39:22 2013 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Doug Anderson X-Patchwork-Id: 3049061 Return-Path: X-Original-To: patchwork-linux-mmc@patchwork.kernel.org Delivered-To: patchwork-parsemail@patchwork1.web.kernel.org Received: from mail.kernel.org (mail.kernel.org [198.145.19.201]) by patchwork1.web.kernel.org (Postfix) with ESMTP id E0AE39F2B6 for ; Tue, 15 Oct 2013 22:39:39 +0000 (UTC) Received: from mail.kernel.org (localhost [127.0.0.1]) by mail.kernel.org (Postfix) with ESMTP id CB4FA20455 for ; Tue, 15 Oct 2013 22:39:38 +0000 (UTC) Received: from vger.kernel.org (vger.kernel.org [209.132.180.67]) by mail.kernel.org (Postfix) with ESMTP id 8FCBE20457 for ; Tue, 15 Oct 2013 22:39:37 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S933633Ab3JOWjf (ORCPT ); Tue, 15 Oct 2013 18:39:35 -0400 Received: from mail-pb0-f74.google.com ([209.85.160.74]:33503 "EHLO mail-pb0-f74.google.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S933654Ab3JOWjd (ORCPT ); Tue, 15 Oct 2013 18:39:33 -0400 Received: by mail-pb0-f74.google.com with SMTP id rq2so924394pbb.1 for ; Tue, 15 Oct 2013 15:39:32 -0700 (PDT) X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20130820; h=x-gm-message-state:from:to:cc:subject:date:message-id:in-reply-to :references; bh=kNAHISxrs3z1PY0kcYJEDQUNDISCfR3pC25TL2VIA4c=; b=CMXjEw/swI35kS0WnKto6qTuGqstc8q9AfbI8ICLObweJLcEJLlRtQEC2ZjTuaIwVr yZtrs43QMkRuTJYlbnUKaI9WLzy+s9qXSBdrlcayPpNtelRqkSrlJL1u7nAE9gAXXsrv OD48iOYRSjO5Thhaz6gVBLK6fwJEXaWjND0MKwKGiGAgDong2N81IJecMj+5Zbs6WcHX SfIM2vrUW8+zB9Vv8/vSeDeqwe5DAaxK13rhRggY1cZdGY4HX8FGeGUEEJp4CcYTlHHZ E+rAkvCaYhy9n/YbDMjSN/vFCQ29o0mx/FiJIUwp+GvMSkbfAVitee0YYD7iuYmkNmIk KkSw== X-Gm-Message-State: ALoCoQmzWSza0RdXyCGcJmLp8kI4VH96Mv7OgOksJqngPLpPm9R2vg4wGveikns3WL3VQZeLgj1o6tHPUnkA+sNNqEx89LGWXj+umH1VUqfd/NY94R6qMVxWFXQ9UXCe7ZMimzx0Pphs0V7HrDZJQVmlZ2i2YFW6nu5hnAxnuK2ZrP3IX/VshVAJMYaAAYecVSRbWFHBgXPTxrrEfW1Q7pNrx24cp9Sifw== X-Received: by 10.66.17.234 with SMTP id r10mr117207pad.40.1381876772598; Tue, 15 Oct 2013 15:39:32 -0700 (PDT) Received: from corp2gmr1-2.hot.corp.google.com (corp2gmr1-2.hot.corp.google.com [172.24.189.93]) by gmr-mx.google.com with ESMTPS id a24si4223931yhl.1.1969.12.31.16.00.00 (version=TLSv1.1 cipher=AES128-SHA bits=128/128); Tue, 15 Oct 2013 15:39:32 -0700 (PDT) Received: from tictac.mtv.corp.google.com (tictac.mtv.corp.google.com [172.22.72.141]) by corp2gmr1-2.hot.corp.google.com (Postfix) with ESMTP id 0EA665A428D; Tue, 15 Oct 2013 15:39:32 -0700 (PDT) Received: by tictac.mtv.corp.google.com (Postfix, from userid 121310) id B09A680A89; Tue, 15 Oct 2013 15:39:31 -0700 (PDT) From: Doug Anderson To: Chris Ball Cc: Jaehoon Chung , Seungwon Jeon , James Hogan , Grant Grundler , Alim Akhtar , Abhilash Kesavan , Tomasz Figa , Olof Johansson , Sonny Rao , Bing Zhao , Doug Anderson , linux-mmc@vger.kernel.org, linux-kernel@vger.kernel.org Subject: [PATCH 2/2] mmc: dw_mmc: Protect read-modify-write of INTMASK with a lock Date: Tue, 15 Oct 2013 15:39:22 -0700 Message-Id: <1381876762-10892-3-git-send-email-dianders@chromium.org> X-Mailer: git-send-email 1.8.4 In-Reply-To: <1381876762-10892-1-git-send-email-dianders@chromium.org> References: <1381876762-10892-1-git-send-email-dianders@chromium.org> Sender: linux-mmc-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-mmc@vger.kernel.org X-Spam-Status: No, score=-4.4 required=5.0 tests=BAYES_00,KHOP_BIG_TO_CC, RCVD_IN_DNSWL_HI, RP_MATCHES_RCVD, UNPARSEABLE_RELAY autolearn=ham version=3.3.1 X-Spam-Checker-Version: SpamAssassin 3.3.1 (2010-03-16) on mail.kernel.org X-Virus-Scanned: ClamAV using ClamSMTP We're running into cases where our enabling of the SDIO interrupt in dw_mmc doesn't actually take effect. Specifically, adding patch like this: +++ b/drivers/mmc/host/dw_mmc.c @@ -1076,6 +1076,9 @@ static void dw_mci_enable_sdio_irq(struct mmc_host *mmc, int enb) mci_writel(host, INTMASK, (int_mask | SDMMC_INT_SDIO(slot->id))); + int_mask = mci_readl(host, INTMASK); + if (!(int_mask & SDMMC_INT_SDIO(slot->id))) + dev_err(&mmc->class_dev, "failed to enable sdio irq\n"); } else { ...actually triggers the error message. That's because the dw_mci_enable_sdio_irq() unsafely does a read-modify-write of the INTMASK register. We can't just use the standard host->lock since that lock is not irq safe and mmc_signal_sdio_irq() (called from interrupt context) calls dw_mci_enable_sdio_irq(). Add a new irq-safe lock to protect INTMASK. An alternate solution to this is to punt mmc_signal_sdio_irq() to the tasklet and then protect INTMASK modifications by the standard host lock. This seemed like a bit more of a high-latency change. Reported-by: Bing Zhao Signed-off-by: Doug Anderson Reviewed-by: James Hogan --- drivers/mmc/host/dw_mmc.c | 13 +++++++++++++ include/linux/mmc/dw_mmc.h | 6 ++++++ 2 files changed, 19 insertions(+) diff --git a/drivers/mmc/host/dw_mmc.c b/drivers/mmc/host/dw_mmc.c index 1b75816..b810654 100644 --- a/drivers/mmc/host/dw_mmc.c +++ b/drivers/mmc/host/dw_mmc.c @@ -657,6 +657,7 @@ disable: static int dw_mci_submit_data_dma(struct dw_mci *host, struct mmc_data *data) { + unsigned long irqflags; int sg_len; u32 temp; @@ -693,9 +694,11 @@ static int dw_mci_submit_data_dma(struct dw_mci *host, struct mmc_data *data) mci_writel(host, CTRL, temp); /* Disable RX/TX IRQs, let DMA handle it */ + spin_lock_irqsave(&host->intmask_lock, irqflags); temp = mci_readl(host, INTMASK); temp &= ~(SDMMC_INT_RXDR | SDMMC_INT_TXDR); mci_writel(host, INTMASK, temp); + spin_unlock_irqrestore(&host->intmask_lock, irqflags); host->dma_ops->start(host, sg_len); @@ -704,6 +707,7 @@ static int dw_mci_submit_data_dma(struct dw_mci *host, struct mmc_data *data) static void dw_mci_submit_data(struct dw_mci *host, struct mmc_data *data) { + unsigned long irqflags; u32 temp; data->error = -EINPROGRESS; @@ -732,9 +736,12 @@ static void dw_mci_submit_data(struct dw_mci *host, struct mmc_data *data) host->part_buf_count = 0; mci_writel(host, RINTSTS, SDMMC_INT_TXDR | SDMMC_INT_RXDR); + + spin_lock_irqsave(&host->intmask_lock, irqflags); temp = mci_readl(host, INTMASK); temp |= SDMMC_INT_TXDR | SDMMC_INT_RXDR; mci_writel(host, INTMASK, temp); + spin_unlock_irqrestore(&host->intmask_lock, irqflags); temp = mci_readl(host, CTRL); temp &= ~SDMMC_CTRL_DMA_ENABLE; @@ -1089,8 +1096,11 @@ static void dw_mci_enable_sdio_irq(struct mmc_host *mmc, int enb) { struct dw_mci_slot *slot = mmc_priv(mmc); struct dw_mci *host = slot->host; + unsigned long irqflags; u32 int_mask; + spin_lock_irqsave(&host->intmask_lock, irqflags); + /* Enable/disable Slot Specific SDIO interrupt */ int_mask = mci_readl(host, INTMASK); if (enb) @@ -1098,6 +1108,8 @@ static void dw_mci_enable_sdio_irq(struct mmc_host *mmc, int enb) else int_mask &= ~SDMMC_INT_SDIO(slot->id); mci_writel(host, INTMASK, int_mask); + + spin_unlock_irqrestore(&host->intmask_lock, irqflags); } static int dw_mci_execute_tuning(struct mmc_host *mmc, u32 opcode) @@ -2500,6 +2512,7 @@ int dw_mci_probe(struct dw_mci *host) host->quirks = host->pdata->quirks; spin_lock_init(&host->lock); + spin_lock_init(&host->intmask_lock); INIT_LIST_HEAD(&host->queue); /* diff --git a/include/linux/mmc/dw_mmc.h b/include/linux/mmc/dw_mmc.h index 6ce7d2c..002ab56 100644 --- a/include/linux/mmc/dw_mmc.h +++ b/include/linux/mmc/dw_mmc.h @@ -102,6 +102,11 @@ struct mmc_data; * @cur_slot, @mrq and @state. These must always be updated * at the same time while holding @lock. * + * @intmask_lock is an irq-safe spinlock protecting the INTMASK register + * to allow the interrupt handler to modify it directly. Held for only long + * enough to read-modify-write INTMASK and no other locks are grabbed when + * holding this one. + * * The @mrq field of struct dw_mci_slot is also protected by @lock, * and must always be written at the same time as the slot is added to * @queue. @@ -121,6 +126,7 @@ struct mmc_data; */ struct dw_mci { spinlock_t lock; + spinlock_t intmask_lock; void __iomem *regs; struct scatterlist *sg;