From patchwork Sun Oct 27 21:23:50 2013 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Barry Song <21cnbao@gmail.com> X-Patchwork-Id: 3099851 Return-Path: X-Original-To: patchwork-linux-mmc@patchwork.kernel.org Delivered-To: patchwork-parsemail@patchwork2.web.kernel.org Received: from mail.kernel.org (mail.kernel.org [198.145.19.201]) by patchwork2.web.kernel.org (Postfix) with ESMTP id BEBD8BF924 for ; Sun, 27 Oct 2013 21:24:34 +0000 (UTC) Received: from mail.kernel.org (localhost [127.0.0.1]) by mail.kernel.org (Postfix) with ESMTP id DF93E20324 for ; Sun, 27 Oct 2013 21:24:33 +0000 (UTC) Received: from vger.kernel.org (vger.kernel.org [209.132.180.67]) by mail.kernel.org (Postfix) with ESMTP id 1317C20322 for ; Sun, 27 Oct 2013 21:24:33 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1754498Ab3J0VYc (ORCPT ); Sun, 27 Oct 2013 17:24:32 -0400 Received: from mail-wg0-f53.google.com ([74.125.82.53]:34236 "EHLO mail-wg0-f53.google.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1753605Ab3J0VYb (ORCPT ); Sun, 27 Oct 2013 17:24:31 -0400 Received: by mail-wg0-f53.google.com with SMTP id y10so5851469wgg.20 for ; Sun, 27 Oct 2013 14:24:30 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=gmail.com; s=20120113; h=from:to:cc:subject:date:message-id; bh=B7g7OeemcAYG2T/GUVy0CbLCaddmChok6F65HH63po8=; b=upiwzwYCQGB+N3JUE090ptiDuSWnSSQH4VWdN7GtYaS/w/VKtFn82fIfXxV0cQ1S/Y zzhXmQmPf+35m/MGtxFQli5BBLWC7LJoN+zJAG4wmL6ZtDz4BOVoFOvy34gHkB18fBRX A7Fy9VUBHRWyxLstqHT01JStw5IZwh/xnwldCRe8X/DqHHKM/j0DaPWCsuvbnmy1JNtL Y6NF706kCJ5D6XAVAmyiiXS5NMpUf75exbjeWOK3ZEiEkZWV0TWZkQMVt2sGsE+/UjLy eui+BYhUY8DhGkbHmzItJRq+9fmaDgIEjV5Tvtmv/7NaeZeYT7kFPRb1z1UgOKstsBCc ypEA== X-Received: by 10.194.174.36 with SMTP id bp4mr15283573wjc.7.1382909070111; Sun, 27 Oct 2013 14:24:30 -0700 (PDT) Received: from localhost.localdomain (host217-41-31-179.in-addr.btopenworld.com. [217.41.31.179]) by mx.google.com with ESMTPSA id h1sm6612856wiw.9.2013.10.27.14.24.26 for (version=TLSv1 cipher=ECDHE-RSA-RC4-SHA bits=128/128); Sun, 27 Oct 2013 14:24:29 -0700 (PDT) From: Barry Song <21cnbao@gmail.com> To: cjb@laptop.org, linux-mmc@vger.kernel.org Cc: linux-arm-kernel@lists.infradead.org, workgroup.linux@csr.com, Bin Shi , Binghua Duan , Barry Song Subject: [PATCH] mmc: sdhci-sirf: enable dmabounce since SiRFprimaII MMC DMA only access up to 256MB Date: Mon, 28 Oct 2013 05:23:50 +0800 Message-Id: <1382909030-7499-1-git-send-email-Baohua.Song@csr.com> X-Mailer: git-send-email 1.8.2.3 Sender: linux-mmc-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-mmc@vger.kernel.org X-Spam-Status: No, score=-7.3 required=5.0 tests=BAYES_00, DKIM_ADSP_CUSTOM_MED, DKIM_SIGNED, FREEMAIL_FROM, RCVD_IN_DNSWL_HI, RP_MATCHES_RCVD, T_DKIM_INVALID, UNPARSEABLE_RELAY autolearn=ham version=3.3.1 X-Spam-Checker-Version: SpamAssassin 3.3.1 (2010-03-16) on mail.kernel.org X-Virus-Scanned: ClamAV using ClamSMTP From: Bin Shi on SiRFprimaII, sdhci is after pci-iobg bus, the bus bridge has a hardware limitation. DMA operations after this bridge can not access memory address higher than 256MB. this patch enables dmabounce for SiRFprimaII to fix DMA of primaII. for other SiRF SoCs, there is no this problem. Signed-off-by: Bin Shi Signed-off-by: Binghua Duan Signed-off-by: Barry Song --- arch/arm/mach-prima2/Kconfig | 1 + drivers/mmc/host/sdhci-sirf.c | 18 ++++++++++++++++++ 2 files changed, 19 insertions(+) diff --git a/arch/arm/mach-prima2/Kconfig b/arch/arm/mach-prima2/Kconfig index 6988b11..8ecb071 100644 --- a/arch/arm/mach-prima2/Kconfig +++ b/arch/arm/mach-prima2/Kconfig @@ -26,6 +26,7 @@ config ARCH_PRIMA2 bool "CSR SiRFSoC PRIMA2 ARM Cortex A9 Platform" default y select CPU_V7 + select DMABOUNCE select SIRF_IRQ select ZONE_DMA help diff --git a/drivers/mmc/host/sdhci-sirf.c b/drivers/mmc/host/sdhci-sirf.c index 696122c..11e270f 100644 --- a/drivers/mmc/host/sdhci-sirf.c +++ b/drivers/mmc/host/sdhci-sirf.c @@ -13,6 +13,7 @@ #include #include #include +#include #include "sdhci-pltfm.h" struct sdhci_sirf_priv { @@ -40,6 +41,16 @@ static struct sdhci_pltfm_data sdhci_sirf_pdata = { SDHCI_QUIRK_DELAY_AFTER_POWER, }; +/* + * The following functions are needed for DMA bouncing because SiRFprimaII SD + * controller can address up to 256MByte + */ +static int sdhci_sirf_needs_bounce(struct device *dev, dma_addr_t dma_addr, + size_t size) +{ + return (dma_addr + size) >= SZ_256M; +} + static int sdhci_sirf_probe(struct platform_device *pdev) { struct sdhci_host *host; @@ -92,6 +103,13 @@ static int sdhci_sirf_probe(struct platform_device *pdev) } } + if (of_machine_is_compatible("sirf,prima2")) { + if (pdev->dev.dma_mask) + *(pdev->dev.dma_mask) = SZ_256M - 1; + pdev->dev.coherent_dma_mask = SZ_256M - 1; + dmabounce_register_dev(&pdev->dev, 1024, 2048, sdhci_sirf_needs_bounce); + } + return 0; err_request_cd: