From patchwork Mon Feb 17 19:55:10 2014 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Dinh Nguyen X-Patchwork-Id: 3664691 Return-Path: X-Original-To: patchwork-linux-mmc@patchwork.kernel.org Delivered-To: patchwork-parsemail@patchwork2.web.kernel.org Received: from mail.kernel.org (mail.kernel.org [198.145.19.201]) by patchwork2.web.kernel.org (Postfix) with ESMTP id 7CF5DBF13A for ; Mon, 17 Feb 2014 20:12:09 +0000 (UTC) Received: from mail.kernel.org (localhost [127.0.0.1]) by mail.kernel.org (Postfix) with ESMTP id 8807D201C7 for ; Mon, 17 Feb 2014 20:12:08 +0000 (UTC) Received: from vger.kernel.org (vger.kernel.org [209.132.180.67]) by mail.kernel.org (Postfix) with ESMTP id 8AF7D20212 for ; Mon, 17 Feb 2014 20:12:07 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1754229AbaBQUMG (ORCPT ); Mon, 17 Feb 2014 15:12:06 -0500 Received: from mail-bn1bon0148.outbound.protection.outlook.com ([157.56.111.148]:37879 "EHLO na01-bn1-obe.outbound.protection.outlook.com" rhost-flags-OK-OK-OK-FAIL) by vger.kernel.org with ESMTP id S1752704AbaBQUMF (ORCPT ); Mon, 17 Feb 2014 15:12:05 -0500 Received: from BN1AFFO11FD026.protection.gbl (10.58.52.30) by BN1AFFO11HUB028.protection.gbl (10.58.52.138) with Microsoft SMTP Server (TLS) id 15.0.868.13; Mon, 17 Feb 2014 19:57:19 +0000 Received: from SJ-ITEXEDGE02.altera.priv.altera.com (66.35.236.232) by BN1AFFO11FD026.mail.protection.outlook.com (10.58.52.86) with Microsoft SMTP Server (TLS) id 15.0.868.13 via Frontend Transport; Mon, 17 Feb 2014 19:57:18 +0000 Received: from sj-mail01.altera.com (137.57.1.6) by SJ-ITEXEDGE02.altera.priv.altera.com (66.35.236.232) with Microsoft SMTP Server id 8.3.342.0; Mon, 17 Feb 2014 11:44:40 -0800 Received: from linux-builds1.altera.com (linux-builds1.altera.com [137.57.188.114]) by sj-mail01.altera.com (8.13.7+Sun/8.13.7) with ESMTP id s1HJvE5A027229; Mon, 17 Feb 2014 11:57:16 -0800 (PST) From: To: CC: , , Dinh Nguyen , Rob Herring , Pawel Moll , Mark Rutland , Ian Campbell , Kumar Gala , Seungwon Jeon , Jaehoon Chung , Chris Ball Subject: [PATCHv2 2/3] mmc: dw_mmc: Add support for SOCFPGA's platform specific implementation Date: Mon, 17 Feb 2014 13:55:10 -0600 Message-ID: <1392666911-15985-2-git-send-email-dinguyen@altera.com> X-Mailer: git-send-email 1.7.9.5 In-Reply-To: <1392666911-15985-1-git-send-email-dinguyen@altera.com> References: <1392666911-15985-1-git-send-email-dinguyen@altera.com> MIME-Version: 1.0 X-EOPAttributedMessage: 0 X-Forefront-Antispam-Report: CIP:66.35.236.232; CTRY:US; IPV:NLI; EFV:NLI; SFV:NSPM; SFS:(10019001)(6009001)(189002)(199002)(87266001)(87286001)(80022001)(65816001)(85306002)(95666001)(47736001)(33646001)(47446002)(50466002)(92566001)(31966008)(74662001)(83072002)(85852003)(81542001)(69226001)(92726001)(74366001)(81342001)(86152002)(90146001)(89996001)(94946001)(48376002)(56816005)(74502001)(93136001)(94316002)(4396001)(62966002)(87936001)(47976001)(49866001)(50986001)(50226001)(95416001)(53806001)(54316002)(47776003)(79102001)(36756003)(83322001)(20776003)(88136002)(74706001)(74876001)(81686001)(77982001)(93916002)(93516002)(86362001)(80976001)(46102001)(81816001)(51856001)(59766001)(56776001)(19580395003)(76482001)(19580405001)(53416003)(77156001)(44976005)(76796001)(63696002)(6806004)(77096001)(76786001); DIR:OUT; SFP:1102; SCL:1; SRVR:BN1AFFO11HUB028; H:SJ-ITEXEDGE02.altera.priv.altera.com; CLIP:66.35.236.232; FPR:F084F37F.B0DE176B.F7186F47.5C9202F1.20257; MLV:nspm; InfoDomainNonexiste ntMX:1;A:1;LANG:en; X-OriginatorOrg: altera.onmicrosoft.com X-Forefront-PRVS: 012570D5A0 Sender: linux-mmc-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-mmc@vger.kernel.org X-Spam-Status: No, score=-4.6 required=5.0 tests=BAYES_00,KHOP_BIG_TO_CC, RCVD_IN_DNSWL_HI, RP_MATCHES_RCVD, UNPARSEABLE_RELAY autolearn=ham version=3.3.1 X-Spam-Checker-Version: SpamAssassin 3.3.1 (2010-03-16) on mail.kernel.org X-Virus-Scanned: ClamAV using ClamSMTP From: Dinh Nguyen Like the rockchip, Altera's SOCFPGA platform specific implementation of the dw_mmc driver requires using the HOLD register for SD commands. Signed-off-by: Dinh Nguyen Acked-by: Steffen Trumtrar Tested-by: Steffen Trumtrar Cc: Rob Herring Cc: Pawel Moll Cc: Mark Rutland Cc: Ian Campbell Cc: Kumar Gala Cc: Seungwon Jeon Cc: Jaehoon Chung Cc: Chris Ball --- v2: Use dw_mci_socfpga_prepare_command instead of dw_mci_rockchip_prepare_command --- drivers/mmc/host/dw_mmc-pltfm.c | 11 +++++++++++ 1 file changed, 11 insertions(+) diff --git a/drivers/mmc/host/dw_mmc-pltfm.c b/drivers/mmc/host/dw_mmc-pltfm.c index 5c49656..5b87cc2 100644 --- a/drivers/mmc/host/dw_mmc-pltfm.c +++ b/drivers/mmc/host/dw_mmc-pltfm.c @@ -30,10 +30,19 @@ static void dw_mci_rockchip_prepare_command(struct dw_mci *host, u32 *cmdr) *cmdr |= SDMMC_CMD_USE_HOLD_REG; } +static void dw_mci_socfpga_prepare_command(struct dw_mci *host, u32 *cmdr) +{ + *cmdr |= SDMMC_CMD_USE_HOLD_REG; +} + static const struct dw_mci_drv_data rockchip_drv_data = { .prepare_command = dw_mci_rockchip_prepare_command, }; +static const struct dw_mci_drv_data socfpga_drv_data = { + .prepare_command = dw_mci_socfpga_prepare_command, +}; + int dw_mci_pltfm_register(struct platform_device *pdev, const struct dw_mci_drv_data *drv_data) { @@ -92,6 +101,8 @@ static const struct of_device_id dw_mci_pltfm_match[] = { { .compatible = "snps,dw-mshc", }, { .compatible = "rockchip,rk2928-dw-mshc", .data = &rockchip_drv_data }, + { .compatible = "altr,socfpga-dw-mshc", + .data = &socfpga_drv_data }, {}, }; MODULE_DEVICE_TABLE(of, dw_mci_pltfm_match);