diff mbox

[v8,11/17] ARM: dts: sun6i: Add mmc controller nodes

Message ID 1398164497-14212-12-git-send-email-hdegoede@redhat.com (mailing list archive)
State New, archived
Headers show

Commit Message

Hans de Goede April 22, 2014, 11:01 a.m. UTC
Add nodes for the 4 mmc controllers found on A31 SoCs to
arch/arm/boot/dts/sun6i-a31.dtsi.

Signed-off-by: Hans de Goede <hdegoede@redhat.com>
---
 arch/arm/boot/dts/sun6i-a31.dtsi | 52 ++++++++++++++++++++++++++++++++++++++++
 1 file changed, 52 insertions(+)

Comments

Maxime Ripard April 23, 2014, 9:50 a.m. UTC | #1
On Tue, Apr 22, 2014 at 01:01:31PM +0200, Hans de Goede wrote:
> Add nodes for the 4 mmc controllers found on A31 SoCs to
> arch/arm/boot/dts/sun6i-a31.dtsi.
> 
> Signed-off-by: Hans de Goede <hdegoede@redhat.com>
> ---
>  arch/arm/boot/dts/sun6i-a31.dtsi | 52 ++++++++++++++++++++++++++++++++++++++++
>  1 file changed, 52 insertions(+)
> 
> diff --git a/arch/arm/boot/dts/sun6i-a31.dtsi b/arch/arm/boot/dts/sun6i-a31.dtsi
> index 12bcc17..a27afc8 100644
> --- a/arch/arm/boot/dts/sun6i-a31.dtsi
> +++ b/arch/arm/boot/dts/sun6i-a31.dtsi
> @@ -269,6 +269,58 @@
>  		#size-cells = <1>;
>  		ranges;
>  
> +		mmc0: mmc@01c0f000 {
> +			compatible = "allwinner,sun5i-a13-mmc";
> +			reg = <0x01c0f000 0x1000>;
> +			clocks = <&ahb1_gates 8>, <&mmc0_clk>;
> +			clock-names = "ahb", "mod";
> +			resets = <&ahb1_rst 8>;
> +			reset-names = "ahb";
> +			interrupts = <0 60 4>;
> +			bus-width = <4>;
> +			cd-inverted;

The two last items should be in the DTS.

Looks good otherwise.

Thanks!
Maxime
Hans de Goede April 23, 2014, 10:11 a.m. UTC | #2
Hi,

On 04/23/2014 11:50 AM, Maxime Ripard wrote:
> On Tue, Apr 22, 2014 at 01:01:31PM +0200, Hans de Goede wrote:
>> Add nodes for the 4 mmc controllers found on A31 SoCs to
>> arch/arm/boot/dts/sun6i-a31.dtsi.
>>
>> Signed-off-by: Hans de Goede <hdegoede@redhat.com>
>> ---
>>  arch/arm/boot/dts/sun6i-a31.dtsi | 52 ++++++++++++++++++++++++++++++++++++++++
>>  1 file changed, 52 insertions(+)
>>
>> diff --git a/arch/arm/boot/dts/sun6i-a31.dtsi b/arch/arm/boot/dts/sun6i-a31.dtsi
>> index 12bcc17..a27afc8 100644
>> --- a/arch/arm/boot/dts/sun6i-a31.dtsi
>> +++ b/arch/arm/boot/dts/sun6i-a31.dtsi
>> @@ -269,6 +269,58 @@
>>  		#size-cells = <1>;
>>  		ranges;
>>  
>> +		mmc0: mmc@01c0f000 {
>> +			compatible = "allwinner,sun5i-a13-mmc";
>> +			reg = <0x01c0f000 0x1000>;
>> +			clocks = <&ahb1_gates 8>, <&mmc0_clk>;
>> +			clock-names = "ahb", "mod";
>> +			resets = <&ahb1_rst 8>;
>> +			reset-names = "ahb";
>> +			interrupts = <0 60 4>;
>> +			bus-width = <4>;
>> +			cd-inverted;
> 
> The two last items should be in the DTS.

Ah, I had fixed sun4i / sun5i & sun7i but forgot about this one,
fixed in my local tree now. I've also squashed the m9 mmc enablement
patch into the m9 addition patch as you've requested.

Regards,

Hans
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diff mbox

Patch

diff --git a/arch/arm/boot/dts/sun6i-a31.dtsi b/arch/arm/boot/dts/sun6i-a31.dtsi
index 12bcc17..a27afc8 100644
--- a/arch/arm/boot/dts/sun6i-a31.dtsi
+++ b/arch/arm/boot/dts/sun6i-a31.dtsi
@@ -269,6 +269,58 @@ 
 		#size-cells = <1>;
 		ranges;
 
+		mmc0: mmc@01c0f000 {
+			compatible = "allwinner,sun5i-a13-mmc";
+			reg = <0x01c0f000 0x1000>;
+			clocks = <&ahb1_gates 8>, <&mmc0_clk>;
+			clock-names = "ahb", "mod";
+			resets = <&ahb1_rst 8>;
+			reset-names = "ahb";
+			interrupts = <0 60 4>;
+			bus-width = <4>;
+			cd-inverted;
+			status = "disabled";
+		};
+
+		mmc1: mmc@01c10000 {
+			compatible = "allwinner,sun5i-a13-mmc";
+			reg = <0x01c10000 0x1000>;
+			clocks = <&ahb1_gates 9>, <&mmc1_clk>;
+			clock-names = "ahb", "mod";
+			resets = <&ahb1_rst 9>;
+			reset-names = "reset";
+			interrupts = <0 61 4>;
+			bus-width = <4>;
+			cd-inverted;
+			status = "disabled";
+		};
+
+		mmc2: mmc@01c11000 {
+			compatible = "allwinner,sun5i-a13-mmc";
+			reg = <0x01c11000 0x1000>;
+			clocks = <&ahb1_gates 10>, <&mmc2_clk>;
+			clock-names = "ahb", "mod";
+			resets = <&ahb1_rst 10>;
+			reset-names = "reset";
+			interrupts = <0 62 4>;
+			bus-width = <4>;
+			cd-inverted;
+			status = "disabled";
+		};
+
+		mmc3: mmc@01c12000 {
+			compatible = "allwinner,sun5i-a13-mmc";
+			reg = <0x01c12000 0x1000>;
+			clocks = <&ahb1_gates 11>, <&mmc3_clk>;
+			clock-names = "ahb", "mod";
+			resets = <&ahb1_rst 11>;
+			reset-names = "reset";
+			interrupts = <0 63 4>;
+			bus-width = <4>;
+			cd-inverted;
+			status = "disabled";
+		};
+
 		nmi_intc: interrupt-controller@01f00c0c {
 			compatible = "allwinner,sun6i-a31-sc-nmi";
 			interrupt-controller;