| Message ID | 1398507381-5614-11-git-send-email-hdegoede@redhat.com (mailing list archive) |
|---|---|
| State | New, archived |
| Headers | show |
On Sat, Apr 26, 2014 at 12:16:14PM +0200, Hans de Goede wrote: > Add clk-nodes for the mmc clocks. > > Signed-off-by: Hans de Goede <hdegoede@redhat.com> > --- > arch/arm/boot/dts/sun6i-a31.dtsi | 32 ++++++++++++++++++++++++++++++++ > 1 file changed, 32 insertions(+) > > diff --git a/arch/arm/boot/dts/sun6i-a31.dtsi b/arch/arm/boot/dts/sun6i-a31.dtsi > index d45efa7..12bcc17 100644 > --- a/arch/arm/boot/dts/sun6i-a31.dtsi > +++ b/arch/arm/boot/dts/sun6i-a31.dtsi > @@ -198,6 +198,38 @@ > "apb2_uart4", "apb2_uart5"; > }; > > + mmc0_clk: clk@01c20088 { > + #clock-cells = <0>; > + compatible = "allwinner,sun4i-a10-mod0-clk"; And this is not misleading but wrong. The MMC clocks have the phase control feature that mod0 clock don't have, so they should have a compatible of their own.
Hi, On 04/28/2014 09:37 PM, Maxime Ripard wrote: > On Sat, Apr 26, 2014 at 12:16:14PM +0200, Hans de Goede wrote: >> Add clk-nodes for the mmc clocks. >> >> Signed-off-by: Hans de Goede <hdegoede@redhat.com> >> --- >> arch/arm/boot/dts/sun6i-a31.dtsi | 32 ++++++++++++++++++++++++++++++++ >> 1 file changed, 32 insertions(+) >> >> diff --git a/arch/arm/boot/dts/sun6i-a31.dtsi b/arch/arm/boot/dts/sun6i-a31.dtsi >> index d45efa7..12bcc17 100644 >> --- a/arch/arm/boot/dts/sun6i-a31.dtsi >> +++ b/arch/arm/boot/dts/sun6i-a31.dtsi >> @@ -198,6 +198,38 @@ >> "apb2_uart4", "apb2_uart5"; >> }; >> >> + mmc0_clk: clk@01c20088 { >> + #clock-cells = <0>; >> + compatible = "allwinner,sun4i-a10-mod0-clk"; > > And this is not misleading but wrong. The MMC clocks have the phase > control feature that mod0 clock don't have, so they should have a > compatible of their own. You said the same thing when I posted v8, and I replied to that, that this is the exact same construction used as with sun4i, sun5i and sun7i. I agree this needs to be fixed, but it needs to be fixed for *all* of them, and IMHO it is best to be consistently "wrong" for now and then fix them all in one go (and all in the same way) when we've landed a generic way of dealing with phase-control. So for now I'm going to keep this as is, iow the same as the clock bindings for mmc which we already have for sun4i, sun5i and sun7i which all have the same issue. Regards, Hans -- To unsubscribe from this list: send the line "unsubscribe linux-mmc" in the body of a message to majordomo@vger.kernel.org More majordomo info at http://vger.kernel.org/majordomo-info.html
diff --git a/arch/arm/boot/dts/sun6i-a31.dtsi b/arch/arm/boot/dts/sun6i-a31.dtsi index d45efa7..12bcc17 100644 --- a/arch/arm/boot/dts/sun6i-a31.dtsi +++ b/arch/arm/boot/dts/sun6i-a31.dtsi @@ -198,6 +198,38 @@ "apb2_uart4", "apb2_uart5"; }; + mmc0_clk: clk@01c20088 { + #clock-cells = <0>; + compatible = "allwinner,sun4i-a10-mod0-clk"; + reg = <0x01c20088 0x4>; + clocks = <&osc24M>, <&pll6>; + clock-output-names = "mmc0"; + }; + + mmc1_clk: clk@01c2008c { + #clock-cells = <0>; + compatible = "allwinner,sun4i-a10-mod0-clk"; + reg = <0x01c2008c 0x4>; + clocks = <&osc24M>, <&pll6>; + clock-output-names = "mmc1"; + }; + + mmc2_clk: clk@01c20090 { + #clock-cells = <0>; + compatible = "allwinner,sun4i-a10-mod0-clk"; + reg = <0x01c20090 0x4>; + clocks = <&osc24M>, <&pll6>; + clock-output-names = "mmc2"; + }; + + mmc3_clk: clk@01c20094 { + #clock-cells = <0>; + compatible = "allwinner,sun4i-a10-mod0-clk"; + reg = <0x01c20094 0x4>; + clocks = <&osc24M>, <&pll6>; + clock-output-names = "mmc3"; + }; + spi0_clk: clk@01c200a0 { #clock-cells = <0>; compatible = "allwinner,sun4i-a10-mod0-clk";
Add clk-nodes for the mmc clocks. Signed-off-by: Hans de Goede <hdegoede@redhat.com> --- arch/arm/boot/dts/sun6i-a31.dtsi | 32 ++++++++++++++++++++++++++++++++ 1 file changed, 32 insertions(+)