From patchwork Tue Apr 29 08:21:14 2014 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Srinivas Kandagatla X-Patchwork-Id: 4085761 Return-Path: X-Original-To: patchwork-linux-mmc@patchwork.kernel.org Delivered-To: patchwork-parsemail@patchwork2.web.kernel.org Received: from mail.kernel.org (mail.kernel.org [198.145.19.201]) by patchwork2.web.kernel.org (Postfix) with ESMTP id BEB0ABFF02 for ; Tue, 29 Apr 2014 08:21:42 +0000 (UTC) Received: from mail.kernel.org (localhost [127.0.0.1]) by mail.kernel.org (Postfix) with ESMTP id E13D7201F2 for ; Tue, 29 Apr 2014 08:21:41 +0000 (UTC) Received: from vger.kernel.org (vger.kernel.org [209.132.180.67]) by mail.kernel.org (Postfix) with ESMTP id 1AB1820155 for ; Tue, 29 Apr 2014 08:21:41 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S932985AbaD2IV1 (ORCPT ); Tue, 29 Apr 2014 04:21:27 -0400 Received: from mail-wi0-f175.google.com ([209.85.212.175]:64973 "EHLO mail-wi0-f175.google.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S932884AbaD2IVW (ORCPT ); Tue, 29 Apr 2014 04:21:22 -0400 Received: by mail-wi0-f175.google.com with SMTP id cc10so6967905wib.8 for ; Tue, 29 Apr 2014 01:21:21 -0700 (PDT) X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20130820; h=x-gm-message-state:from:to:cc:subject:date:message-id:in-reply-to :references; bh=6UW+PB7ocfqUugZjXyX2QqDleJWLq3mbFGtqNL09G0o=; b=P/GDO+XPdVqTT0/GJqI1U8DV4hbI3ca3/RN4/Y4OJZFtZ8TtKermlGgjWa/nTzHTQw nByPP59lJVc9sMkA3Dv9aLe6JJjx00A0uC0FRQDn0e+7Wu7CImPQoqJjJkKGohh8qTGU zZ9aa2zqnp99QQ24LRAMcuWEPqSfDyWd00aHSzGccUB4aDmdazRqvE58hBdO8HSV5lah QL9Y8D7qCkzIEfWkK36qdbfQA1dCmupvdELxIjpBZ+N3tVNUTs+TJNpcCJ30sqwo3px/ PajYWd5Ti5pSwSIrf/rJTW1aBzF/P5zPsqq/L3bdsBMd3kmzQOiQf+/4dVn8V7lWazff 9eLg== X-Gm-Message-State: ALoCoQmzTmqIwyq0TFBOrcoGDcYQh2vPS0wy6c7cT9+nT8LiRBJ4DYsYdQvV5oVGbYN9mlcYW8C5 X-Received: by 10.180.218.2 with SMTP id pc2mr19254827wic.19.1398759680935; Tue, 29 Apr 2014 01:21:20 -0700 (PDT) Received: from srinivas-Inspiron-N5050.dlink.com (host-78-147-6-229.as13285.net. [78.147.6.229]) by mx.google.com with ESMTPSA id fo10sm831103wib.12.2014.04.29.01.21.19 for (version=TLSv1.1 cipher=ECDHE-RSA-RC4-SHA bits=128/128); Tue, 29 Apr 2014 01:21:20 -0700 (PDT) From: srinivas.kandagatla@linaro.org To: Russell King , linux-mmc@vger.kernel.org Cc: Chris Ball , Ulf Hansson , linux-kernel@vger.kernel.org, agross@quicinc.com, linux-arm-msm@vger.kernel.org, Srinivas Kandagatla Subject: [PATCH v1 11/11] mmc: mmci: Add Qcom specific pio_read function. Date: Tue, 29 Apr 2014 09:21:14 +0100 Message-Id: <1398759674-13421-1-git-send-email-srinivas.kandagatla@linaro.org> X-Mailer: git-send-email 1.7.9.5 In-Reply-To: <1398759492-12970-1-git-send-email-srinivas.kandagatla@linaro.org> References: <1398759492-12970-1-git-send-email-srinivas.kandagatla@linaro.org> Sender: linux-mmc-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-mmc@vger.kernel.org X-Spam-Status: No, score=-7.5 required=5.0 tests=BAYES_00, RCVD_IN_DNSWL_HI, RP_MATCHES_RCVD, UNPARSEABLE_RELAY autolearn=unavailable version=3.3.1 X-Spam-Checker-Version: SpamAssassin 3.3.1 (2010-03-16) on mail.kernel.org X-Virus-Scanned: ClamAV using ClamSMTP From: Srinivas Kandagatla MCIFIFOCNT register behaviour on Qcom chips is very different than the other pl180 integrations. MCIFIFOCNT register contains the number of words that are still waiting to be transferred through the FIFO. It keeps decrementing once the host CPU reads the MCIFIFO. With the existing logic and the MCIFIFOCNT behaviour, mmci_pio_read will loop forever, as the FIFOCNT register will always return transfer size before reading the FIFO. Also the data sheet states that "This register is only useful for debug purposes and should not be used for normal operation since it does not reflect data which may or may not be in the pipeline". This patch implements qcom_pio_read function so as existing mmci_pio_read is not suitable for Qcom SOCs. Signed-off-by: Srinivas Kandagatla --- drivers/mmc/host/mmci.c | 31 +++++++++++++++++++++++++++++-- 1 file changed, 29 insertions(+), 2 deletions(-) diff --git a/drivers/mmc/host/mmci.c b/drivers/mmc/host/mmci.c index def1b19..45198b6 100644 --- a/drivers/mmc/host/mmci.c +++ b/drivers/mmc/host/mmci.c @@ -1038,6 +1038,29 @@ mmci_cmd_irq(struct mmci_host *host, struct mmc_command *cmd, } } +static int mmci_qcom_pio_read(struct mmci_host *host, char *buffer, + unsigned int remain) +{ + uint32_t *ptr = (uint32_t *) buffer; + int count = 0; + struct variant_data *variant = host->variant; + int fifo_size = variant->fifosize; + + if (remain % 4) + remain = ((remain >> 2) + 1) << 2; + + while (readl(host->base + MMCISTATUS) & MCI_RXDATAAVLBL) { + *ptr = readl(host->base + MMCIFIFO + (count % fifo_size)); + ptr++; + count += sizeof(uint32_t); + + remain -= sizeof(uint32_t); + if (remain == 0) + break; + } + return count; +} + static int mmci_pio_read(struct mmci_host *host, char *buffer, unsigned int remain) { void __iomem *base = host->base; @@ -1159,8 +1182,12 @@ static irqreturn_t mmci_pio_irq(int irq, void *dev_id) remain = sg_miter->length; len = 0; - if (status & MCI_RXACTIVE) - len = mmci_pio_read(host, buffer, remain); + if (status & MCI_RXACTIVE) { + if (host->hw_designer == AMBA_VENDOR_QCOM) + len = mmci_qcom_pio_read(host, buffer, remain); + else + len = mmci_pio_read(host, buffer, remain); + } if (status & MCI_TXACTIVE) len = mmci_pio_write(host, buffer, remain, status);