diff mbox

[v13,1/2] clk: sunxi: Fixup clk_sunxi_mmc_phase_control to take a clk rather then a hw_clk

Message ID 1399896288-5826-2-git-send-email-hdegoede@redhat.com (mailing list archive)
State New, archived
Headers show

Commit Message

Hans de Goede May 12, 2014, 12:04 p.m. UTC
__clk_get_hw is supposed to be used by clk providers, not clk consumers.

Signed-off-by: Hans de Goede <hdegoede@redhat.com>
---
 drivers/clk/sunxi/clk-sunxi.c | 3 ++-
 include/linux/clk/sunxi.h     | 2 +-
 2 files changed, 3 insertions(+), 2 deletions(-)

Comments

Ulf Hansson May 14, 2014, 12:23 p.m. UTC | #1
On 12 May 2014 14:04, Hans de Goede <hdegoede@redhat.com> wrote:
> __clk_get_hw is supposed to be used by clk providers, not clk consumers.
>
> Signed-off-by: Hans de Goede <hdegoede@redhat.com>

Reviewed-by: Ulf Hansson <ulf.hansson@linaro.org>

> ---
>  drivers/clk/sunxi/clk-sunxi.c | 3 ++-
>  include/linux/clk/sunxi.h     | 2 +-
>  2 files changed, 3 insertions(+), 2 deletions(-)
>
> diff --git a/drivers/clk/sunxi/clk-sunxi.c b/drivers/clk/sunxi/clk-sunxi.c
> index 59f9040..4cc2b2a 100644
> --- a/drivers/clk/sunxi/clk-sunxi.c
> +++ b/drivers/clk/sunxi/clk-sunxi.c
> @@ -510,11 +510,12 @@ CLK_OF_DECLARE(sun7i_a20_gmac, "allwinner,sun7i-a20-gmac-clk",
>   * clk_sunxi_mmc_phase_control() - configures MMC clock phase control
>   */
>
> -void clk_sunxi_mmc_phase_control(struct clk_hw *hw, u8 sample, u8 output)
> +void clk_sunxi_mmc_phase_control(struct clk *clk, u8 sample, u8 output)
>  {
>         #define to_clk_composite(_hw) container_of(_hw, struct clk_composite, hw)
>         #define to_clk_factors(_hw) container_of(_hw, struct clk_factors, hw)
>
> +       struct clk_hw *hw = __clk_get_hw(clk);
>         struct clk_composite *composite = to_clk_composite(hw);
>         struct clk_hw *rate_hw = composite->rate_hw;
>         struct clk_factors *factors = to_clk_factors(rate_hw);
> diff --git a/include/linux/clk/sunxi.h b/include/linux/clk/sunxi.h
> index 1ef5c89..aed28c4 100644
> --- a/include/linux/clk/sunxi.h
> +++ b/include/linux/clk/sunxi.h
> @@ -17,6 +17,6 @@
>
>  #include <linux/clk.h>
>
> -void clk_sunxi_mmc_phase_control(struct clk_hw *hw, u8 sample, u8 output);
> +void clk_sunxi_mmc_phase_control(struct clk *clk, u8 sample, u8 output);
>
>  #endif
> --
> 1.9.0
>
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diff mbox

Patch

diff --git a/drivers/clk/sunxi/clk-sunxi.c b/drivers/clk/sunxi/clk-sunxi.c
index 59f9040..4cc2b2a 100644
--- a/drivers/clk/sunxi/clk-sunxi.c
+++ b/drivers/clk/sunxi/clk-sunxi.c
@@ -510,11 +510,12 @@  CLK_OF_DECLARE(sun7i_a20_gmac, "allwinner,sun7i-a20-gmac-clk",
  * clk_sunxi_mmc_phase_control() - configures MMC clock phase control
  */
 
-void clk_sunxi_mmc_phase_control(struct clk_hw *hw, u8 sample, u8 output)
+void clk_sunxi_mmc_phase_control(struct clk *clk, u8 sample, u8 output)
 {
 	#define to_clk_composite(_hw) container_of(_hw, struct clk_composite, hw)
 	#define to_clk_factors(_hw) container_of(_hw, struct clk_factors, hw)
 
+	struct clk_hw *hw = __clk_get_hw(clk);
 	struct clk_composite *composite = to_clk_composite(hw);
 	struct clk_hw *rate_hw = composite->rate_hw;
 	struct clk_factors *factors = to_clk_factors(rate_hw);
diff --git a/include/linux/clk/sunxi.h b/include/linux/clk/sunxi.h
index 1ef5c89..aed28c4 100644
--- a/include/linux/clk/sunxi.h
+++ b/include/linux/clk/sunxi.h
@@ -17,6 +17,6 @@ 
 
 #include <linux/clk.h>
 
-void clk_sunxi_mmc_phase_control(struct clk_hw *hw, u8 sample, u8 output);
+void clk_sunxi_mmc_phase_control(struct clk *clk, u8 sample, u8 output);
 
 #endif