From patchwork Thu May 15 09:37:08 2014 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Srinivas Kandagatla X-Patchwork-Id: 4180541 Return-Path: X-Original-To: patchwork-linux-mmc@patchwork.kernel.org Delivered-To: patchwork-parsemail@patchwork2.web.kernel.org Received: from mail.kernel.org (mail.kernel.org [198.145.19.201]) by patchwork2.web.kernel.org (Postfix) with ESMTP id B21D6BFF02 for ; Thu, 15 May 2014 09:41:08 +0000 (UTC) Received: from mail.kernel.org (localhost [127.0.0.1]) by mail.kernel.org (Postfix) with ESMTP id DF50120306 for ; Thu, 15 May 2014 09:41:07 +0000 (UTC) Received: from vger.kernel.org (vger.kernel.org [209.132.180.67]) by mail.kernel.org (Postfix) with ESMTP id E526D2037E for ; Thu, 15 May 2014 09:41:06 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1754443AbaEOJhS (ORCPT ); Thu, 15 May 2014 05:37:18 -0400 Received: from mail-wi0-f169.google.com ([209.85.212.169]:48826 "EHLO mail-wi0-f169.google.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1754331AbaEOJhN (ORCPT ); Thu, 15 May 2014 05:37:13 -0400 Received: by mail-wi0-f169.google.com with SMTP id hi2so282331wib.2 for ; Thu, 15 May 2014 02:37:12 -0700 (PDT) X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20130820; h=x-gm-message-state:from:to:cc:subject:date:message-id:in-reply-to :references; bh=reyyErLZtWAQicCRlVKKUo2ag3i4lp7P5Ra06+KvtAA=; b=E2fs3cmZGXxNd/rF1Kq8qbK1mhMwR90NY/yWzlxcIhGtBjKcq8AtadO1I7dcMrO5dT G20Kzy10PQlnDaDuKW+dKm42ufqd9QxYp7c5ZWwORs36A5tCVvCzCrZrh0CcyJEK/JoP 75+F6+ENA2baoG9tr1r3ygro2kLVBuVPf0r3vHsCbHrgXuvUf51Vr1ZiCanwmT9Jp3zK N0TBsP+GO9CkIP3/r3chVIT+ojifCU4+4Pcz/B4i4Y+jXn07Y39v0F/K5wSax8hHdOEt WwLhgVcrcGbEk8onbyURTAokjEPROSSGfTpQSpR7DvshNowL30C5X2eqFV0QOi7u/Ekt PJGA== X-Gm-Message-State: ALoCoQm0nnX63oNYklV5FU9b42vXrd3FIbhITPQZ/j00OwCUWPfMele1o9Vg5dk3nwXIbG2VysDB X-Received: by 10.180.109.69 with SMTP id hq5mr7792695wib.30.1400146632021; Thu, 15 May 2014 02:37:12 -0700 (PDT) Received: from srini-ThinkPad-X1-Carbon-2nd.dlink.com (host-78-145-240-98.as13285.net. [78.145.240.98]) by mx.google.com with ESMTPSA id kp5sm6057065wjb.30.2014.05.15.02.37.10 for (version=TLSv1.2 cipher=ECDHE-RSA-AES128-SHA bits=128/128); Thu, 15 May 2014 02:37:11 -0700 (PDT) From: srinivas.kandagatla@linaro.org To: Russell King , Ulf Hansson , linux-mmc@vger.kernel.org Cc: Chris Ball , linux-kernel@vger.kernel.org, linux-arm-msm@vger.kernel.org, linus.walleij@linaro.org, Srinivas Kandagatla Subject: [PATCH v2 07/14] mmc: mmci: add ddrmode mask to variant data Date: Thu, 15 May 2014 10:37:08 +0100 Message-Id: <1400146628-30097-1-git-send-email-srinivas.kandagatla@linaro.org> X-Mailer: git-send-email 1.9.1 In-Reply-To: <1400146447-29803-1-git-send-email-srinivas.kandagatla@linaro.org> References: <1400146447-29803-1-git-send-email-srinivas.kandagatla@linaro.org> Sender: linux-mmc-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-mmc@vger.kernel.org X-Spam-Status: No, score=-7.5 required=5.0 tests=BAYES_00, RCVD_IN_DNSWL_HI, RP_MATCHES_RCVD, UNPARSEABLE_RELAY autolearn=unavailable version=3.3.1 X-Spam-Checker-Version: SpamAssassin 3.3.1 (2010-03-16) on mail.kernel.org X-Virus-Scanned: ClamAV using ClamSMTP From: Srinivas Kandagatla This patch adds ddrmode mask to variant structure giving more flexibility to the driver to support more SOCs which have different datactrl register layout. Without this patch datactrl register is updated with wrong ddrmode mask on non ST SOCs, resulting in card detection failures. Signed-off-by: Srinivas Kandagatla Reviewed-by: Linus Walleij --- drivers/mmc/host/mmci.c | 8 +++++++- 1 file changed, 7 insertions(+), 1 deletion(-) diff --git a/drivers/mmc/host/mmci.c b/drivers/mmc/host/mmci.c index 1385554..dec70d2 100644 --- a/drivers/mmc/host/mmci.c +++ b/drivers/mmc/host/mmci.c @@ -59,6 +59,7 @@ static unsigned int fmax = 515633; * is asserted (likewise for RX) * @sdio: variant supports SDIO * @st_clkdiv: true if using a ST-specific clock divider algorithm + * @datactrl_mask_ddrmode: ddr mode mask in datactrl register. * @blksz_datactrl16: true if Block size is at b16..b30 position in datactrl register * @blksz_datactrl4: true if Block size is at b4..b16 position in datactrl * register @@ -76,6 +77,7 @@ struct variant_data { unsigned int datalength_bits; unsigned int fifosize; unsigned int fifohalfsize; + unsigned int datactrl_mask_ddrmode; bool sdio; bool st_clkdiv; bool blksz_datactrl16; @@ -114,6 +116,7 @@ static struct variant_data variant_u300 = { .fifosize = 16 * 4, .fifohalfsize = 8 * 4, .clkreg_enable = MCI_ST_U300_HWFCEN, + .datactrl_mask_ddrmode = MCI_ST_DPSM_DDRMODE, .datalength_bits = 16, .sdio = true, .pwrreg_powerup = MCI_PWR_ON, @@ -126,6 +129,7 @@ static struct variant_data variant_nomadik = { .fifosize = 16 * 4, .fifohalfsize = 8 * 4, .clkreg = MCI_CLK_ENABLE, + .datactrl_mask_ddrmode = MCI_ST_DPSM_DDRMODE, .datalength_bits = 24, .sdio = true, .st_clkdiv = true, @@ -140,6 +144,7 @@ static struct variant_data variant_ux500 = { .fifohalfsize = 8 * 4, .clkreg = MCI_CLK_ENABLE, .clkreg_enable = MCI_ST_UX500_HWFCEN, + .datactrl_mask_ddrmode = MCI_ST_DPSM_DDRMODE, .datalength_bits = 24, .sdio = true, .st_clkdiv = true, @@ -155,6 +160,7 @@ static struct variant_data variant_ux500v2 = { .fifohalfsize = 8 * 4, .clkreg = MCI_CLK_ENABLE, .clkreg_enable = MCI_ST_UX500_HWFCEN, + .datactrl_mask_ddrmode = MCI_ST_DPSM_DDRMODE, .datalength_bits = 24, .sdio = true, .st_clkdiv = true, @@ -800,7 +806,7 @@ static void mmci_start_data(struct mmci_host *host, struct mmc_data *data) } if (host->mmc->ios.timing == MMC_TIMING_UHS_DDR50) - datactrl |= MCI_ST_DPSM_DDRMODE; + datactrl |= variant->datactrl_mask_ddrmode; /* * Attempt to use DMA operation mode, if this