From patchwork Wed May 28 13:46:47 2014 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Srinivas Kandagatla X-Patchwork-Id: 4255251 Return-Path: X-Original-To: patchwork-linux-mmc@patchwork.kernel.org Delivered-To: patchwork-parsemail@patchwork2.web.kernel.org Received: from mail.kernel.org (mail.kernel.org [198.145.19.201]) by patchwork2.web.kernel.org (Postfix) with ESMTP id CE493BF90B for ; Wed, 28 May 2014 13:47:05 +0000 (UTC) Received: from mail.kernel.org (localhost [127.0.0.1]) by mail.kernel.org (Postfix) with ESMTP id 563642026C for ; Wed, 28 May 2014 13:47:03 +0000 (UTC) Received: from vger.kernel.org (vger.kernel.org [209.132.180.67]) by mail.kernel.org (Postfix) with ESMTP id 7670820145 for ; Wed, 28 May 2014 13:47:01 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1754072AbaE1Nq4 (ORCPT ); Wed, 28 May 2014 09:46:56 -0400 Received: from mail-wi0-f175.google.com ([209.85.212.175]:61498 "EHLO mail-wi0-f175.google.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1754066AbaE1Nqy (ORCPT ); Wed, 28 May 2014 09:46:54 -0400 Received: by mail-wi0-f175.google.com with SMTP id f8so3670698wiw.8 for ; Wed, 28 May 2014 06:46:52 -0700 (PDT) X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20130820; h=x-gm-message-state:from:to:cc:subject:date:message-id:in-reply-to :references; bh=c+fC0JzK0Zdxu8wC9fWq3A0Bi+38kISgfYqlEZwxf88=; b=SBTdp6SjWXSIwjMBvEP9D2xlAK3nr4rT8WFab0+hJ8g5DpqlOjBPG5iCJr31hBe6zm fASGluR+PGJ3L94L4IvGXIUcb+0ilTEUgigKKptdwFYvEK1TcZ0WQ0+XCl4y3W1I9qtY t2D6jNQxNofmsLmZUWR97i4IIMV5eRZyqK3CZqWR21zhf4PH/sW6E8xwUEvrAlUXbb2V p4ZPYk7qeLWDOMpLwcLvUpIvM/NRWiz8S83Eojvpj9bOEWnUIpz26YbdWk0DaI1q6uoS 70X8/BciP6kjEjP0SvsB2XpmaCakd2urKNVvmBy/jwlSty3eIucSOjXNxawfhaCQRajH UATA== X-Gm-Message-State: ALoCoQlYeeOgV2FnzeFBqfPkKc6BQezBS8OtrciOjZ/L6oM6NexaIH+0EKZSZl3YlHBj1iphl8tn X-Received: by 10.194.6.166 with SMTP id c6mr51165996wja.64.1401284812805; Wed, 28 May 2014 06:46:52 -0700 (PDT) Received: from srini-ThinkPad-X1-Carbon-2nd.dlink.com (host-78-149-4-211.as13285.net. [78.149.4.211]) by mx.google.com with ESMTPSA id lo18sm17059176wic.1.2014.05.28.06.46.50 for (version=TLSv1.2 cipher=ECDHE-RSA-AES128-SHA bits=128/128); Wed, 28 May 2014 06:46:51 -0700 (PDT) From: srinivas.kandagatla@linaro.org To: Russell King , Ulf Hansson , linux-mmc@vger.kernel.org Cc: Chris Ball , linux-kernel@vger.kernel.org, linux-arm-msm@vger.kernel.org, linus.walleij@linaro.org, Srinivas Kandagatla Subject: [PATCH v4 06/13] mmc: mmci: add ddrmode mask to variant data Date: Wed, 28 May 2014 14:46:47 +0100 Message-Id: <1401284807-16686-1-git-send-email-srinivas.kandagatla@linaro.org> X-Mailer: git-send-email 1.9.1 In-Reply-To: <1401284608-16428-1-git-send-email-srinivas.kandagatla@linaro.org> References: <1401284608-16428-1-git-send-email-srinivas.kandagatla@linaro.org> Sender: linux-mmc-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-mmc@vger.kernel.org X-Spam-Status: No, score=-7.5 required=5.0 tests=BAYES_00, RCVD_IN_DNSWL_HI, RP_MATCHES_RCVD, UNPARSEABLE_RELAY autolearn=ham version=3.3.1 X-Spam-Checker-Version: SpamAssassin 3.3.1 (2010-03-16) on mail.kernel.org X-Virus-Scanned: ClamAV using ClamSMTP From: Srinivas Kandagatla This patch adds ddrmode mask to variant structure giving more flexibility to the driver to support more SOCs which have different datactrl register layout. Without this patch datactrl register is updated with wrong ddrmode mask on non ST SOCs, resulting in card detection failures. Signed-off-by: Srinivas Kandagatla Reviewed-by: Linus Walleij --- drivers/mmc/host/mmci.c | 5 ++++- 1 file changed, 4 insertions(+), 1 deletion(-) diff --git a/drivers/mmc/host/mmci.c b/drivers/mmc/host/mmci.c index 23401b0..729105b 100644 --- a/drivers/mmc/host/mmci.c +++ b/drivers/mmc/host/mmci.c @@ -59,6 +59,7 @@ static unsigned int fmax = 515633; * is asserted (likewise for RX) * @sdio: variant supports SDIO * @st_clkdiv: true if using a ST-specific clock divider algorithm + * @datactrl_mask_ddrmode: ddr mode mask in datactrl register. * @blksz_datactrl16: true if Block size is at b16..b30 position in datactrl register * @blksz_datactrl4: true if Block size is at b4..b16 position in datactrl * register @@ -74,6 +75,7 @@ struct variant_data { unsigned int datalength_bits; unsigned int fifosize; unsigned int fifohalfsize; + unsigned int datactrl_mask_ddrmode; bool sdio; bool st_clkdiv; bool blksz_datactrl16; @@ -152,6 +154,7 @@ static struct variant_data variant_ux500v2 = { .fifohalfsize = 8 * 4, .clkreg = MCI_CLK_ENABLE, .clkreg_enable = MCI_ST_UX500_HWFCEN, + .datactrl_mask_ddrmode = MCI_ST_DPSM_DDRMODE, .datalength_bits = 24, .sdio = true, .st_clkdiv = true, @@ -779,7 +782,7 @@ static void mmci_start_data(struct mmci_host *host, struct mmc_data *data) } if (host->mmc->ios.timing == MMC_TIMING_UHS_DDR50) - datactrl |= MCI_ST_DPSM_DDRMODE; + datactrl |= variant->datactrl_mask_ddrmode; /* * Attempt to use DMA operation mode, if this