From patchwork Mon Jun 2 09:09:15 2014 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Srinivas Kandagatla X-Patchwork-Id: 4280701 Return-Path: X-Original-To: patchwork-linux-mmc@patchwork.kernel.org Delivered-To: patchwork-parsemail@patchwork1.web.kernel.org Received: from mail.kernel.org (mail.kernel.org [198.145.19.201]) by patchwork1.web.kernel.org (Postfix) with ESMTP id 30F229F1D6 for ; Mon, 2 Jun 2014 09:12:06 +0000 (UTC) Received: from mail.kernel.org (localhost [127.0.0.1]) by mail.kernel.org (Postfix) with ESMTP id 599A020340 for ; Mon, 2 Jun 2014 09:12:05 +0000 (UTC) Received: from vger.kernel.org (vger.kernel.org [209.132.180.67]) by mail.kernel.org (Postfix) with ESMTP id 7AC2C202EB for ; Mon, 2 Jun 2014 09:12:04 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1752878AbaFBJMB (ORCPT ); Mon, 2 Jun 2014 05:12:01 -0400 Received: from mail-wg0-f45.google.com ([74.125.82.45]:37192 "EHLO mail-wg0-f45.google.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1753401AbaFBJJU (ORCPT ); Mon, 2 Jun 2014 05:09:20 -0400 Received: by mail-wg0-f45.google.com with SMTP id m15so4693841wgh.4 for ; Mon, 02 Jun 2014 02:09:19 -0700 (PDT) X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20130820; h=x-gm-message-state:from:to:cc:subject:date:message-id:in-reply-to :references; bh=WYWRZA1UPclbFMLH8SnWjmJeAYdHtOQd5PZGe/gI5Vc=; b=J5ctX5P8qzAJJoj+4tSzxjFx0DBR0WRr5SqbLZsnHJ9zidacrGK6Q76VQ8DimYpthG mb6OFT7FzsqPCc6Oa5d/6jvw4mw1cSj7pYLUfcGUvcG76othQ07B5xq4PG5kHpB3ZAom zXVu81taRWcPJ24R59WYHuDJMllNzZ2wst5mpnseIU0xKOj9weWWOKw2r4T0DB4FhDiA y2HmUSji7umY/yZXLSF9dL6gAh4F9ZemnYTYa5U6OzxroBnjEVf+2lZ0hLyn2DKCzsbA q8kRzpWhDFwhVt3XRNRgsLxefOkDv/XhYUpYMtxt1iBiqs5leihzNDQYoPq0/dnnVrC/ vYtg== X-Gm-Message-State: ALoCoQluNkMDE8/7u9EGOjt9emPGw9Ap2TN/hXwbqI+1lU1W0LYRpqmbQp+syjBHoGHAa77p8F9z X-Received: by 10.194.2.244 with SMTP id 20mr23411488wjx.26.1401700159563; Mon, 02 Jun 2014 02:09:19 -0700 (PDT) Received: from srini-ThinkPad-X1-Carbon-2nd.dlink.com (host-78-149-12-106.as13285.net. [78.149.12.106]) by mx.google.com with ESMTPSA id k2sm33831074wjq.20.2014.06.02.02.09.17 for (version=TLSv1.2 cipher=ECDHE-RSA-AES128-SHA bits=128/128); Mon, 02 Jun 2014 02:09:18 -0700 (PDT) From: srinivas.kandagatla@linaro.org To: Russell King , Ulf Hansson , linux-mmc@vger.kernel.org Cc: Chris Ball , linux-kernel@vger.kernel.org, linux-arm-msm@vger.kernel.org, linus.walleij@linaro.org, Srinivas Kandagatla Subject: [PATCH v6 05/12] mmc: mmci: add ddrmode mask to variant data Date: Mon, 2 Jun 2014 10:09:15 +0100 Message-Id: <1401700155-11629-1-git-send-email-srinivas.kandagatla@linaro.org> X-Mailer: git-send-email 1.9.1 In-Reply-To: <1401699818-11329-1-git-send-email-srinivas.kandagatla@linaro.org> References: <1401699818-11329-1-git-send-email-srinivas.kandagatla@linaro.org> Sender: linux-mmc-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-mmc@vger.kernel.org X-Spam-Status: No, score=-7.5 required=5.0 tests=BAYES_00, RCVD_IN_DNSWL_HI, RP_MATCHES_RCVD, UNPARSEABLE_RELAY autolearn=unavailable version=3.3.1 X-Spam-Checker-Version: SpamAssassin 3.3.1 (2010-03-16) on mail.kernel.org X-Virus-Scanned: ClamAV using ClamSMTP From: Srinivas Kandagatla This patch adds ddrmode mask to variant structure giving more flexibility to the driver to support more SOCs which have different datactrl register layout. Without this patch datactrl register is updated with incorrect ddrmode mask, resulting in failures on Qualcomm SD Card Controller. Signed-off-by: Srinivas Kandagatla Reviewed-by: Linus Walleij --- drivers/mmc/host/mmci.c | 5 ++++- 1 file changed, 4 insertions(+), 1 deletion(-) diff --git a/drivers/mmc/host/mmci.c b/drivers/mmc/host/mmci.c index 72981f6..ad7e538 100644 --- a/drivers/mmc/host/mmci.c +++ b/drivers/mmc/host/mmci.c @@ -59,6 +59,7 @@ static unsigned int fmax = 515633; * is asserted (likewise for RX) * @sdio: variant supports SDIO * @st_clkdiv: true if using a ST-specific clock divider algorithm + * @datactrl_mask_ddrmode: ddr mode mask in datactrl register. * @blksz_datactrl16: true if Block size is at b16..b30 position in datactrl register * @blksz_datactrl4: true if Block size is at b4..b16 position in datactrl * register @@ -74,6 +75,7 @@ struct variant_data { unsigned int datalength_bits; unsigned int fifosize; unsigned int fifohalfsize; + unsigned int datactrl_mask_ddrmode; bool sdio; bool st_clkdiv; bool blksz_datactrl16; @@ -152,6 +154,7 @@ static struct variant_data variant_ux500v2 = { .fifohalfsize = 8 * 4, .clkreg = MCI_CLK_ENABLE, .clkreg_enable = MCI_ST_UX500_HWFCEN, + .datactrl_mask_ddrmode = MCI_ST_DPSM_DDRMODE, .datalength_bits = 24, .sdio = true, .st_clkdiv = true, @@ -770,7 +773,7 @@ static void mmci_start_data(struct mmci_host *host, struct mmc_data *data) } if (host->mmc->ios.timing == MMC_TIMING_UHS_DDR50) - datactrl |= MCI_ST_DPSM_DDRMODE; + datactrl |= variant->datactrl_mask_ddrmode; /* * Attempt to use DMA operation mode, if this