From patchwork Tue Aug 19 07:07:47 2014 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Barry Song X-Patchwork-Id: 4740981 Return-Path: X-Original-To: patchwork-linux-mmc@patchwork.kernel.org Delivered-To: patchwork-parsemail@patchwork2.web.kernel.org Received: from mail.kernel.org (mail.kernel.org [198.145.19.201]) by patchwork2.web.kernel.org (Postfix) with ESMTP id 6CCC0C0338 for ; Tue, 19 Aug 2014 07:08:31 +0000 (UTC) Received: from mail.kernel.org (localhost [127.0.0.1]) by mail.kernel.org (Postfix) with ESMTP id 8A32720148 for ; Tue, 19 Aug 2014 07:08:30 +0000 (UTC) Received: from vger.kernel.org (vger.kernel.org [209.132.180.67]) by mail.kernel.org (Postfix) with ESMTP id 659DA2013A for ; Tue, 19 Aug 2014 07:08:29 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1752812AbaHSHI2 (ORCPT ); Tue, 19 Aug 2014 03:08:28 -0400 Received: from cluster-d.mailcontrol.com ([85.115.60.190]:34948 "EHLO cluster-d.mailcontrol.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1752726AbaHSHI2 (ORCPT ); Tue, 19 Aug 2014 03:08:28 -0400 Received: from shaapppus01.asia.root.pri ([210.13.83.99]) by rly49d.srv.mailcontrol.com (MailControl) with ESMTP id s7J77teJ009674 (version=TLSv1/SSLv3 cipher=AES128-SHA bits=128 verify=NO); Tue, 19 Aug 2014 08:07:58 +0100 Received: from shaasiexc01.ASIA.ROOT.PRI ([10.125.12.102]) by shaapppus01.asia.root.pri (PGP Universal service); Tue, 19 Aug 2014 15:07:59 +0800 X-PGP-Universal: processed; by shaapppus01.asia.root.pri on Tue, 19 Aug 2014 15:07:59 +0800 Received: from barry-laptop.ROOT.PRI (10.125.5.73) by asimail.csr.com (10.125.12.88) with Microsoft SMTP Server (TLS) id 14.3.158.1; Tue, 19 Aug 2014 15:07:54 +0800 From: Barry Song To: , CC: , , , Minda Chen , Barry Song Subject: [PATCH] mmc: sdhci-sirf: fix 8bit width enable by overwriting set_bus_width Date: Tue, 19 Aug 2014 15:07:47 +0800 Message-ID: <1408432067-5257-1-git-send-email-Barry.Song@csr.com> X-Mailer: git-send-email 1.7.9.5 MIME-Version: 1.0 X-Originating-IP: [10.125.5.73] X-CFilter-Loop: Reflected X-Scanned-By: MailControl 30291.32 (www.mailcontrol.com) on 10.68.0.159 Sender: linux-mmc-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-mmc@vger.kernel.org X-Spam-Status: No, score=-7.6 required=5.0 tests=BAYES_00, RCVD_IN_DNSWL_HI, RP_MATCHES_RCVD, UNPARSEABLE_RELAY autolearn=ham version=3.3.1 X-Spam-Checker-Version: SpamAssassin 3.3.1 (2010-03-16) on mail.kernel.org X-Virus-Scanned: ClamAV using ClamSMTP From: Minda Chen 8bit-width enable bit of CSR MMC hosts is 3, while stardard hosts use bit 5. this patch fixes the functionality of 8bit transfer in CSR mmc controllers and improve performance for mmc0 a lot. Signed-off-by: Minda Chen Signed-off-by: Barry Song --- drivers/mmc/host/sdhci-sirf.c | 27 ++++++++++++++++++++++++++- 1 file changed, 26 insertions(+), 1 deletion(-) diff --git a/drivers/mmc/host/sdhci-sirf.c b/drivers/mmc/host/sdhci-sirf.c index 1700453..376f45f 100644 --- a/drivers/mmc/host/sdhci-sirf.c +++ b/drivers/mmc/host/sdhci-sirf.c @@ -15,6 +15,8 @@ #include #include "sdhci-pltfm.h" +#define SDHCI_SIRF_8BITBUS BIT(3) + struct sdhci_sirf_priv { struct clk *clk; int gpio_cd; @@ -27,10 +29,33 @@ static unsigned int sdhci_sirf_get_max_clk(struct sdhci_host *host) return clk_get_rate(priv->clk); } +static void sdhci_sirf_set_bus_width(struct sdhci_host *host, int width) +{ + u8 ctrl; + + ctrl = sdhci_readb(host, SDHCI_HOST_CONTROL); + if (width == MMC_BUS_WIDTH_8) { + ctrl &= ~SDHCI_CTRL_4BITBUS; + /* + * 8bit-width enable bit of CSR MMC hosts is 3, + * while stardard hosts use bit 5 + */ + ctrl |= SDHCI_SIRF_8BITBUS; + } else { + if (host->version >= SDHCI_SPEC_300) + ctrl &= ~SDHCI_SIRF_8BITBUS; + if (width == MMC_BUS_WIDTH_4) + ctrl |= SDHCI_CTRL_4BITBUS; + else + ctrl &= ~SDHCI_CTRL_4BITBUS; + } + sdhci_writeb(host, ctrl, SDHCI_HOST_CONTROL); +} + static struct sdhci_ops sdhci_sirf_ops = { .set_clock = sdhci_set_clock, .get_max_clock = sdhci_sirf_get_max_clk, - .set_bus_width = sdhci_set_bus_width, + .set_bus_width = sdhci_sirf_set_bus_width, .reset = sdhci_reset, .set_uhs_signaling = sdhci_set_uhs_signaling, };