From patchwork Thu Oct 30 06:36:56 2014 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Scott Branden X-Patchwork-Id: 5193981 Return-Path: X-Original-To: patchwork-linux-mmc@patchwork.kernel.org Delivered-To: patchwork-parsemail@patchwork2.web.kernel.org Received: from mail.kernel.org (mail.kernel.org [198.145.19.201]) by patchwork2.web.kernel.org (Postfix) with ESMTP id 66B2CC11AC for ; Thu, 30 Oct 2014 06:38:25 +0000 (UTC) Received: from mail.kernel.org (localhost [127.0.0.1]) by mail.kernel.org (Postfix) with ESMTP id C74972024C for ; Thu, 30 Oct 2014 06:38:20 +0000 (UTC) Received: from vger.kernel.org (vger.kernel.org [209.132.180.67]) by mail.kernel.org (Postfix) with ESMTP id 1B4AB20179 for ; Thu, 30 Oct 2014 06:38:16 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1757506AbaJ3Gh6 (ORCPT ); Thu, 30 Oct 2014 02:37:58 -0400 Received: from mail-gw2-out.broadcom.com ([216.31.210.63]:15186 "EHLO mail-gw2-out.broadcom.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1758148AbaJ3GhI (ORCPT ); Thu, 30 Oct 2014 02:37:08 -0400 X-IronPort-AV: E=Sophos;i="5.07,284,1413270000"; d="scan'208";a="49476493" Received: from irvexchcas08.broadcom.com (HELO IRVEXCHCAS08.corp.ad.broadcom.com) ([10.9.208.57]) by mail-gw2-out.broadcom.com with ESMTP; 30 Oct 2014 00:01:00 -0700 Received: from IRVEXCHSMTP1.corp.ad.broadcom.com (10.9.207.51) by IRVEXCHCAS08.corp.ad.broadcom.com (10.9.208.57) with Microsoft SMTP Server (TLS) id 14.3.174.1; Wed, 29 Oct 2014 23:37:07 -0700 Received: from mail-irva-13.broadcom.com (10.10.10.20) by IRVEXCHSMTP1.corp.ad.broadcom.com (10.9.207.51) with Microsoft SMTP Server id 14.3.174.1; Wed, 29 Oct 2014 23:37:06 -0700 Received: from mail.broadcom.com (lbrmn-lnxub113.ric.broadcom.com [10.136.13.65]) by mail-irva-13.broadcom.com (Postfix) with ESMTP id 1A27C40FE6; Wed, 29 Oct 2014 23:36:48 -0700 (PDT) From: Scott Branden To: Ulf Hansson , Russell King , Peter Griffin , Stephen Warren , Chris Ball , Piotr Krol CC: , , Joe Perches , , Ray Jui , , Scott Branden Subject: [PATCHv2 4/5] mmc: shdci-bcm2835: add verify for 32-bit back-to-back workaround Date: Wed, 29 Oct 2014 23:36:56 -0700 Message-ID: <1414651017-3545-5-git-send-email-sbranden@broadcom.com> X-Mailer: git-send-email 1.7.9.5 In-Reply-To: <1414651017-3545-1-git-send-email-sbranden@broadcom.com> References: <1414651017-3545-1-git-send-email-sbranden@broadcom.com> MIME-Version: 1.0 Sender: linux-mmc-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-mmc@vger.kernel.org X-Spam-Status: No, score=-7.5 required=5.0 tests=BAYES_00, RCVD_IN_DNSWL_HI, RP_MATCHES_RCVD, UNPARSEABLE_RELAY autolearn=unavailable version=3.3.1 X-Spam-Checker-Version: SpamAssassin 3.3.1 (2010-03-16) on mail.kernel.org X-Virus-Scanned: ClamAV using ClamSMTP Add a verify option to driver to print out an error message if a potential back to back write could cause a clock domain issue. Signed-off-by: Scott Branden --- drivers/mmc/host/Kconfig | 9 +++++++++ drivers/mmc/host/sdhci-bcm2835.c | 17 +++++++++++++++++ 2 files changed, 26 insertions(+) diff --git a/drivers/mmc/host/Kconfig b/drivers/mmc/host/Kconfig index 1386065..020de98 100644 --- a/drivers/mmc/host/Kconfig +++ b/drivers/mmc/host/Kconfig @@ -292,6 +292,15 @@ config MMC_SDHCI_BCM2835 If unsure, say N. +config MMC_SDHCI_BCM2835_VERIFY_WORKAROUND + bool "Verify BCM2835 workaround does not do back to back writes" + depends on MMC_SDHCI_BCM2835 + default y + help + This enables code that verifies the bcm2835 workaround. + The verification code checks that back to back writes to the same + register do not occur. + config MMC_MOXART tristate "MOXART SD/MMC Host Controller support" depends on ARCH_MOXART && MMC diff --git a/drivers/mmc/host/sdhci-bcm2835.c b/drivers/mmc/host/sdhci-bcm2835.c index f8c450a..11af27f 100644 --- a/drivers/mmc/host/sdhci-bcm2835.c +++ b/drivers/mmc/host/sdhci-bcm2835.c @@ -27,6 +27,9 @@ struct bcm2835_sdhci_host { u32 shadow_cmd; u32 shadow_blk; +#ifdef CONFIG_MMC_SDHCI_BCM2835_VERIFY_WORKAROUND + int previous_reg; +#endif }; #define REG_OFFSET_IN_BITS(reg) ((reg) << 3 & 0x18) @@ -58,6 +61,20 @@ static u8 bcm2835_sdhci_readb(struct sdhci_host *host, int reg) static inline void bcm2835_sdhci_writel(struct sdhci_host *host, u32 val, int reg) { +#ifdef CONFIG_MMC_SDHCI_BCM2835_VERIFY_WORKAROUND + struct sdhci_pltfm_host *pltfm_host = sdhci_priv(host); + struct bcm2835_sdhci_host *bcm2835_host = pltfm_host->priv; + + if (bcm2835_host->previous_reg == reg) { + if ((reg != SDHCI_HOST_CONTROL) + && (reg != SDHCI_CLOCK_CONTROL)) { + dev_err(mmc_dev(host->mmc), + "back-to-back write to 0x%x\n", reg); + } + } + bcm2835_host->previous_reg = reg; +#endif + writel(val, host->ioaddr + reg); }