From patchwork Fri Nov 21 06:39:10 2014 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Shawn Guo X-Patchwork-Id: 5353071 Return-Path: X-Original-To: patchwork-linux-mmc@patchwork.kernel.org Delivered-To: patchwork-parsemail@patchwork2.web.kernel.org Received: from mail.kernel.org (mail.kernel.org [198.145.19.201]) by patchwork2.web.kernel.org (Postfix) with ESMTP id 19AFDC11AC for ; Fri, 21 Nov 2014 06:40:25 +0000 (UTC) Received: from mail.kernel.org (localhost [127.0.0.1]) by mail.kernel.org (Postfix) with ESMTP id 4F5812018E for ; Fri, 21 Nov 2014 06:40:24 +0000 (UTC) Received: from vger.kernel.org (vger.kernel.org [209.132.180.67]) by mail.kernel.org (Postfix) with ESMTP id 68734201BB for ; Fri, 21 Nov 2014 06:40:23 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1751795AbaKUGkS (ORCPT ); Fri, 21 Nov 2014 01:40:18 -0500 Received: from mail-pa0-f45.google.com ([209.85.220.45]:65246 "EHLO mail-pa0-f45.google.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1757834AbaKUGkO (ORCPT ); Fri, 21 Nov 2014 01:40:14 -0500 Received: by mail-pa0-f45.google.com with SMTP id lj1so4216952pab.32 for ; Thu, 20 Nov 2014 22:40:13 -0800 (PST) X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20130820; h=x-gm-message-state:from:to:cc:subject:date:message-id; bh=DicLTE7po5B+G9yBZMiLKX8ca64tMEgIERhpzHZ/afI=; b=QtVGCG4S+YJ3oK27fPQXkfL7PKWKwx37Fl+0cc0RKdv908LB8ZllN2omZKgt+es5Ht +9LKybNIRUzM9Ke6x+acdgRYKwNsr1A9/N/uxQD3hNIQDcFgwwXsJaSfi5WvovSVZT56 29RHHX8O5OsWeqFKJDwb/IvxBeZC4Qs8B1gbOc/GlddKD1DKFi0XoQMPHU2v8kqLFBZr FgQ2DL3B6bN179nfwYYM7oPfNuzl9PM44/7UR7UfwYT3pXeaBMPlY74J6JOjdfT+wa42 UmbTUDZbRg5v3jtNvGtPrXmmHfX8fgsEKmTXjo9rhi+IT3QDgonMDxS51FKfApeHwbiM Nqsw== X-Gm-Message-State: ALoCoQnum7MMxtw6L6Qs/8FL3FA7nQWQMWv9/v9BXueMMtIPt5bQ1q8or0fI3at4lua6EFbTqBqF X-Received: by 10.68.98.131 with SMTP id ei3mr3589233pbb.127.1416552013513; Thu, 20 Nov 2014 22:40:13 -0800 (PST) Received: from localhost.localdomain ([180.107.5.182]) by mx.google.com with ESMTPSA id ip1sm3813300pbc.0.2014.11.20.22.39.45 for (version=TLSv1.2 cipher=ECDHE-RSA-AES128-SHA bits=128/128); Thu, 20 Nov 2014 22:40:12 -0800 (PST) From: Shawn Guo To: linux-mmc@vger.kernel.org Cc: Seungwon Jeon , Jaehoon Chung , Chris Ball , Ulf Hansson , linux-arm-kernel@lists.infradead.org, Shawn Guo , Subject: [PATCH] mmc: dw_mmc: fix card read threshold for PIO mode Date: Fri, 21 Nov 2014 14:39:10 +0800 Message-Id: <1416551950-8277-1-git-send-email-shawn.guo@linaro.org> X-Mailer: git-send-email 1.9.1 Sender: linux-mmc-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-mmc@vger.kernel.org X-Spam-Status: No, score=-6.9 required=5.0 tests=BAYES_00, RCVD_IN_DNSWL_HI, T_RP_MATCHES_RCVD, UNPARSEABLE_RELAY autolearn=unavailable version=3.3.1 X-Spam-Checker-Version: SpamAssassin 3.3.1 (2010-03-16) on mail.kernel.org X-Virus-Scanned: ClamAV using ClamSMTP Commit f1d2736c8156 ("mmc: dw_mmc: control card read threshold") introduces a regression for use case where PIO mode is used, i.e. CONFIG_MMC_DW_IDMAC is not disabled. It stops kernel from booting like below. dw_mmc 9408000.dwmmc: fifo-depth property not found, using value of FIFOTH register as default dw_mmc 9408000.dwmmc: Using PIO mode. dw_mmc 9408000.dwmmc: Version ID is 210a dw_mmc 9408000.dwmmc: DW MMC controller at irq 72, 32 bit host data width, 32 deep fifo dw_mmc 9408000.dwmmc: 1 slots initialized ... Waiting for root device /dev/mmcblk0p2... mmc_host mmc0: Bus speed (slot 0) = 52000000Hz (slot req 50000000Hz, actual 26000000HZ div = 1) mmc0: new high speed SDHC card at address b368 mmcblk0: mmc0:b368 AF UD 3.84 GiB Rather than clearing read threshold bits, the best thing that function dw_mci_ctrl_rd_thld() should do is leaving the bits untouched, in case that card read threshold setup is not needed. The patch fixes the regression by changing dw_mci_ctrl_rd_thld() a bit to do nothing in case card read threshold bits setup is not needed. Signed-off-by: Shawn Guo Fixes: f1d2736c8156 ("mmc: dw_mmc: control card read threshold") Cc: # 3.13+ --- drivers/mmc/host/dw_mmc.c | 7 ++----- 1 file changed, 2 insertions(+), 5 deletions(-) diff --git a/drivers/mmc/host/dw_mmc.c b/drivers/mmc/host/dw_mmc.c index 69f0cc68d5b2..52c04ba69970 100644 --- a/drivers/mmc/host/dw_mmc.c +++ b/drivers/mmc/host/dw_mmc.c @@ -628,13 +628,13 @@ static void dw_mci_ctrl_rd_thld(struct dw_mci *host, struct mmc_data *data) if (host->timing != MMC_TIMING_MMC_HS200 && host->timing != MMC_TIMING_UHS_SDR104) - goto disable; + return; blksz_depth = blksz / (1 << host->data_shift); fifo_depth = host->fifo_depth; if (blksz_depth > fifo_depth) - goto disable; + return; /* * If (blksz_depth) >= (fifo_depth >> 1), should be 'thld_size <= blksz' @@ -644,9 +644,6 @@ static void dw_mci_ctrl_rd_thld(struct dw_mci *host, struct mmc_data *data) thld_size = blksz; mci_writel(host, CDTHRCTL, SDMMC_SET_RD_THLD(thld_size, 1)); return; - -disable: - mci_writel(host, CDTHRCTL, SDMMC_SET_RD_THLD(0, 0)); } static int dw_mci_submit_data_dma(struct dw_mci *host, struct mmc_data *data)