From patchwork Thu Feb 26 13:10:26 2015 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Peter Griffin X-Patchwork-Id: 5892101 Return-Path: X-Original-To: patchwork-linux-mmc@patchwork.kernel.org Delivered-To: patchwork-parsemail@patchwork2.web.kernel.org Received: from mail.kernel.org (mail.kernel.org [198.145.29.136]) by patchwork2.web.kernel.org (Postfix) with ESMTP id 48949BF440 for ; Thu, 26 Feb 2015 13:11:47 +0000 (UTC) Received: from mail.kernel.org (localhost [127.0.0.1]) by mail.kernel.org (Postfix) with ESMTP id 57F3D20382 for ; Thu, 26 Feb 2015 13:11:46 +0000 (UTC) Received: from vger.kernel.org (vger.kernel.org [209.132.180.67]) by mail.kernel.org (Postfix) with ESMTP id 4FBCE2039C for ; Thu, 26 Feb 2015 13:11:45 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S932104AbbBZNL3 (ORCPT ); Thu, 26 Feb 2015 08:11:29 -0500 Received: from mail-we0-f170.google.com ([74.125.82.170]:43356 "EHLO mail-we0-f170.google.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1753862AbbBZNKt (ORCPT ); Thu, 26 Feb 2015 08:10:49 -0500 Received: by wesu56 with SMTP id u56so10509065wes.10 for ; Thu, 26 Feb 2015 05:10:48 -0800 (PST) X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20130820; h=x-gm-message-state:from:to:cc:subject:date:message-id:in-reply-to :references; bh=2WHo4RF/ZdYWaMI6XLd8r9rjAcSOneF5//4coyMPzkQ=; b=C0nbJFt1XEgiu1+RHZ4N6JP6FtFDtfCTic3ZqE5+M8A2z7XLGNIeGZEoH6+Ab/fpzO K2vd8HmG5GwdcQfUu13xacPpyGTKMwL1baJVJcu+aFcxJ9xZqeO6bPVYwGd5oYgY5kqY PoJya6Dupw1HSyM0Sj07hY2lmnub9CH69NkNhFVW9i2jsqcxuM8IEtCElV8rTbG8VJJR H7X2i49AhbhOqFn+th2YwPKfnCIjQHrQFmQ62SKTh9fOBYL9M9tBj8OFaQc4TMIpAsyR ThomXv2+YPwh9+r5qNK4hrHkWTxlffWb37XcscS/D+gHVhSJ3DzTi7ZuJd/cKeWp5bxs 5fhA== X-Gm-Message-State: ALoCoQnFA6y2FlsPJrHUBexdEBvGL7oKJECO5m8F4VrU2Zh5Sfnt+yrWUBVGiLI2VTmXe6eXT/5i X-Received: by 10.180.78.202 with SMTP id d10mr49999296wix.25.1424956247949; Thu, 26 Feb 2015 05:10:47 -0800 (PST) Received: from localhost.localdomain (cpc14-aztw22-2-0-cust189.18-1.cable.virginm.net. [82.45.1.190]) by mx.google.com with ESMTPSA id dz6sm23075747wib.0.2015.02.26.05.10.46 (version=TLSv1.2 cipher=ECDHE-RSA-AES128-SHA bits=128/128); Thu, 26 Feb 2015 05:10:47 -0800 (PST) From: Peter Griffin To: linux-arm-kernel@lists.infradead.org, linux-kernel@vger.kernel.org, maxime.coquelin@st.com, patrice.chotard@st.com, srinivas.kandagatla@gmail.com, chris@printf.net, ulf.hansson@linaro.org Cc: peter.griffin@linaro.org, lee.jones@linaro.org, devicetree@vger.kernel.org, linux-mmc@vger.kernel.org, peppe.cavallaro@st.com Subject: [PATCH v2 7/8] mmc: sdhci-st: Update ST SDHCI binding documentation. Date: Thu, 26 Feb 2015 13:10:26 +0000 Message-Id: <1424956227-18258-8-git-send-email-peter.griffin@linaro.org> X-Mailer: git-send-email 1.9.1 In-Reply-To: <1424956227-18258-1-git-send-email-peter.griffin@linaro.org> References: <1424956227-18258-1-git-send-email-peter.griffin@linaro.org> Sender: linux-mmc-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-mmc@vger.kernel.org X-Spam-Status: No, score=-6.9 required=5.0 tests=BAYES_00, RCVD_IN_DNSWL_HI, T_RP_MATCHES_RCVD, UNPARSEABLE_RELAY autolearn=unavailable version=3.3.1 X-Spam-Checker-Version: SpamAssassin 3.3.1 (2010-03-16) on mail.kernel.org X-Virus-Scanned: ClamAV using ClamSMTP This patch updates the binding information to reflect the extra dt options which are now supported by the sdhci-st.c driver which enable support for stih407 family silicon. Stih410 SoC and later support UHS modes for eMMC, so the driver now makes use of these common bindings. Examples are provided for both eMMC (which has additional bindings) and also sd slot for stih407. Signed-off-by: Peter Griffin Acked-by: Maxime Coquelin --- Documentation/devicetree/bindings/mmc/sdhci-st.txt | 100 ++++++++++++++++++--- 1 file changed, 90 insertions(+), 10 deletions(-) diff --git a/Documentation/devicetree/bindings/mmc/sdhci-st.txt b/Documentation/devicetree/bindings/mmc/sdhci-st.txt index 7527db4..18d950d 100644 --- a/Documentation/devicetree/bindings/mmc/sdhci-st.txt +++ b/Documentation/devicetree/bindings/mmc/sdhci-st.txt @@ -5,20 +5,62 @@ Documentation/devicetree/bindings/mmc/mmc.txt and the properties used by the sdhci-st driver. Required properties: -- compatible : Must be "st,sdhci" -- clock-names : Should be "mmc" - See: Documentation/devicetree/bindings/resource-names.txt -- clocks : Phandle of the clock used by the sdhci controler - See: Documentation/devicetree/bindings/clock/clock-bindings.txt +- compatible: Must be "st,sdhci" and it can be compatible to "st,sdhci-stih407" + to set the internal glue logic used for configuring the MMC + subsystem (mmcss) inside the FlashSS (available in STiH407 SoC + family). + +- clock-names: Should be "mmc". + See: Documentation/devicetree/bindings/resource-names.txt +- clocks: Phandle to the clock. + See: Documentation/devicetree/bindings/clock/clock-bindings.txt + +- interrupts: One mmc interrupt should be described here. +- interrupt-names: Should be "mmcirq". + +- pinctrl-names: A pinctrl state names "default" must be defined. +- pinctrl-0: Phandle referencing pin configuration of the sd/emmc controller. + See: Documentation/devicetree/bindings/pinctrl/pinctrl-binding.txt + +- reg: This must provide the host controller base address and it can also + contain the FlashSS Top register for TX/RX delay used by the driver + to configure DLL inside the flashSS, if so reg-names must also be + specified. Optional properties: -- non-removable: non-removable slot - See: Documentation/devicetree/bindings/mmc/mmc.txt -- bus-width: Number of data lines - See: Documentation/devicetree/bindings/mmc/mmc.txt +- reg-names: Should be "mmc" and "top-mmc-delay". "top-mmc-delay" is optional + for eMMC on stih407 family silicon to configure DLL inside FlashSS. + +- non-removable: Non-removable slot. Also used for configuring mmcss in STiH407 SoC + family. + See: Documentation/devicetree/bindings/mmc/mmc.txt. + +- bus-width: Number of data lines. + See: Documentation/devicetree/bindings/mmc/mmc.txt. + +- max-frequency: Can be 200MHz, 100Mz or 50MHz (default) and used for + configuring the CCONFIG3 in the mmcss. + See: Documentation/devicetree/bindings/mmc/mmc.txt. + +- resets: Phandle and reset specifier pair to softreset line of HC IP. + See: Documentation/devicetree/bindings/reset/reset.txt + +- vqmmc-supply: Phandle to the regulator dt node, mentioned as the vcc/vdd + supply in eMMC/SD specs. + +- sd-uhs--sdr50: To enable the SDR50 in the mmcss. + See: Documentation/devicetree/bindings/mmc/mmc.txt. + +- sd-uhs-sdr104: To enable the SDR104 in the mmcss. + See: Documentation/devicetree/bindings/mmc/mmc.txt. + +- sd-uhs-ddr50: To enable the DDR50 in the mmcss. + See: Documentation/devicetree/bindings/mmc/mmc.txt. Example: +/* Example stih416e eMMC configuration */ + mmc0: sdhci@fe81e000 { compatible = "st,sdhci"; status = "disabled"; @@ -29,5 +71,43 @@ mmc0: sdhci@fe81e000 { pinctrl-0 = <&pinctrl_mmc0>; clock-names = "mmc"; clocks = <&clk_s_a1_ls 1>; - bus-width = <8> + bus-width = <8> + +/* Example SD stih407 family configuration */ + +mmc1: sdhci@09080000 { + compatible = "st,sdhci-stih407", "st,sdhci"; + status = "disabled"; + reg = <0x09080000 0x7ff>; + reg-names = "mmc"; + interrupts = ; + interrupt-names = "mmcirq"; + pinctrl-names = "default"; + pinctrl-0 = <&pinctrl_sd1>; + clock-names = "mmc"; + clocks = <&clk_s_c0_flexgen CLK_MMC_1>; + resets = <&softreset STIH407_MMC1_SOFTRESET>; + bus-width = <4>; +}; + +/* Example eMMC stih407 family configuration */ + +mmc0: sdhci@09060000 { + compatible = "st,sdhci-stih407", "st,sdhci"; + status = "disabled"; + reg = <0x09060000 0x7ff>, <0x9061008 0x20>; + reg-names = "mmc", "top-mmc-delay"; + interrupts = ; + interrupt-names = "mmcirq"; + pinctrl-names = "default"; + pinctrl-0 = <&pinctrl_mmc0>; + clock-names = "mmc"; + clocks = <&clk_s_c0_flexgen CLK_MMC_0>; + vqmmc-supply = <&vmmc_reg>; + max-frequency = <200000000>; + bus-width = <8>; + non-removable; + sd-uhs-sdr50; + sd-uhs-sdr104; + sd-uhs-ddr50; };