From patchwork Fri Jan 29 17:21:48 2016 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Chen-Yu Tsai X-Patchwork-Id: 8165181 Return-Path: X-Original-To: patchwork-linux-mmc@patchwork.kernel.org Delivered-To: patchwork-parsemail@patchwork2.web.kernel.org Received: from mail.kernel.org (mail.kernel.org [198.145.29.136]) by patchwork2.web.kernel.org (Postfix) with ESMTP id B875FBEEE5 for ; Fri, 29 Jan 2016 17:23:57 +0000 (UTC) Received: from mail.kernel.org (localhost [127.0.0.1]) by mail.kernel.org (Postfix) with ESMTP id E189C20380 for ; Fri, 29 Jan 2016 17:23:56 +0000 (UTC) Received: from vger.kernel.org (vger.kernel.org [209.132.180.67]) by mail.kernel.org (Postfix) with ESMTP id 15C032037E for ; Fri, 29 Jan 2016 17:23:56 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1756574AbcA2RWY (ORCPT ); Fri, 29 Jan 2016 12:22:24 -0500 Received: from smtp.csie.ntu.edu.tw ([140.112.30.61]:60559 "EHLO smtp.csie.ntu.edu.tw" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1752131AbcA2RWX (ORCPT ); Fri, 29 Jan 2016 12:22:23 -0500 Received: from wens.csie.org (mirror2.csie.ntu.edu.tw [140.112.30.76]) (Authenticated sender: b93043) by smtp.csie.ntu.edu.tw (Postfix) with ESMTPSA id 9BCFB20AE0; Sat, 30 Jan 2016 01:22:20 +0800 (CST) Received: by wens.csie.org (Postfix, from userid 1000) id 6AB205F8AC; Sat, 30 Jan 2016 01:22:20 +0800 (CST) From: Chen-Yu Tsai To: Ulf Hansson , Maxime Ripard Cc: Chen-Yu Tsai , Hans de Goede , linux-mmc@vger.kernel.org, linux-arm-kernel@lists.infradead.org, linux-kernel@vger.kernel.org, linux-sunxi@googlegroups.com Subject: [PATCH 3/3] mmc: sunxi: Enable eMMC HS-DDR (MMC_CAP_1_8V_DDR) support Date: Sat, 30 Jan 2016 01:21:48 +0800 Message-Id: <1454088108-2332-4-git-send-email-wens@csie.org> X-Mailer: git-send-email 2.7.0 In-Reply-To: <1454088108-2332-1-git-send-email-wens@csie.org> References: <1454088108-2332-1-git-send-email-wens@csie.org> Sender: linux-mmc-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-mmc@vger.kernel.org X-Spam-Status: No, score=-6.9 required=5.0 tests=BAYES_00, RCVD_IN_DNSWL_HI, RP_MATCHES_RCVD, UNPARSEABLE_RELAY autolearn=unavailable version=3.3.1 X-Spam-Checker-Version: SpamAssassin 3.3.1 (2010-03-16) on mail.kernel.org X-Virus-Scanned: ClamAV using ClamSMTP Now that clock delay settings for 8 bit DDR are correct, and vqmmc support is available, we can enable MMC_CAP_1_8V_DDR support. This enables MMC HS-DDR at up to 52 MHz, even if signal voltage switching is not available. Signed-off-by: Chen-Yu Tsai --- There was discussion about an alternative: setting this capability in the DT to preserve DT backwards compatibility. However just setting it in the DT without the driver updates also breaks it. Furthermore, Maxime's latest "clk: sunxi: Refactor A31 PLL6 so that it can be reused" patch will break DT compatility. Given the above, I see no reason to try and maintain compatibility only to fail. --- drivers/mmc/host/sunxi-mmc.c | 1 + 1 file changed, 1 insertion(+) diff --git a/drivers/mmc/host/sunxi-mmc.c b/drivers/mmc/host/sunxi-mmc.c index bb4592696046..2aee17cd85ae 100644 --- a/drivers/mmc/host/sunxi-mmc.c +++ b/drivers/mmc/host/sunxi-mmc.c @@ -1131,6 +1131,7 @@ static int sunxi_mmc_probe(struct platform_device *pdev) mmc->f_min = 400000; mmc->f_max = 52000000; mmc->caps |= MMC_CAP_MMC_HIGHSPEED | MMC_CAP_SD_HIGHSPEED | + MMC_CAP_1_8V_DDR | MMC_CAP_ERASE | MMC_CAP_SDIO_IRQ; ret = mmc_of_parse(mmc);