From patchwork Mon Jun 13 23:04:32 2016 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Doug Anderson X-Patchwork-Id: 9174669 Return-Path: Received: from mail.wl.linuxfoundation.org (pdx-wl-mail.web.codeaurora.org [172.30.200.125]) by pdx-korg-patchwork.web.codeaurora.org (Postfix) with ESMTP id 43F516075D for ; Mon, 13 Jun 2016 23:08:27 +0000 (UTC) Received: from mail.wl.linuxfoundation.org (localhost [127.0.0.1]) by mail.wl.linuxfoundation.org (Postfix) with ESMTP id 361E526861 for ; Mon, 13 Jun 2016 23:08:27 +0000 (UTC) Received: by mail.wl.linuxfoundation.org (Postfix, from userid 486) id 2A97A2723E; Mon, 13 Jun 2016 23:08:27 +0000 (UTC) X-Spam-Checker-Version: SpamAssassin 3.3.1 (2010-03-16) on pdx-wl-mail.web.codeaurora.org X-Spam-Level: X-Spam-Status: No, score=-6.8 required=2.0 tests=BAYES_00,DKIM_SIGNED, RCVD_IN_DNSWL_HI,T_DKIM_INVALID autolearn=unavailable version=3.3.1 Received: from vger.kernel.org (vger.kernel.org [209.132.180.67]) by mail.wl.linuxfoundation.org (Postfix) with ESMTP id D2C5326861 for ; Mon, 13 Jun 2016 23:08:26 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1423721AbcFMXFI (ORCPT ); Mon, 13 Jun 2016 19:05:08 -0400 Received: from mail-pf0-f171.google.com ([209.85.192.171]:36840 "EHLO mail-pf0-f171.google.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1423766AbcFMXFD (ORCPT ); Mon, 13 Jun 2016 19:05:03 -0400 Received: by mail-pf0-f171.google.com with SMTP id t190so50490677pfb.3 for ; Mon, 13 Jun 2016 16:05:03 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=chromium.org; s=google; h=from:to:cc:subject:date:message-id:in-reply-to:references; bh=7Rzht7g4n/p0IPbEZHI/HJf0YaX7OgzpEWKTz/Kj7ag=; b=jvr6qsIrO1Sk6EUyHuCT63QSXt8n2uXH1lz57xQGIwTSayd2bbLQgyjH/C26x1wte5 2ycUjK1CT2ZSm9/jYs4bivRD79Gkp1d05oxpFLfgqmIp2g8pOPNlUhK4hO03wE/gt7O3 33ArQ0RYCDljf4Kr9xDaUCXdfqOnzJgq4+wCs= X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20130820; h=x-gm-message-state:from:to:cc:subject:date:message-id:in-reply-to :references; bh=7Rzht7g4n/p0IPbEZHI/HJf0YaX7OgzpEWKTz/Kj7ag=; b=JxujWxjZWn1QVyAS7nmR+X46mBe9aHsqQ6TxheJ2lxe6T1sIW/ZbvX/lE6WwBg9Qfi QhXhSKIlhGFCPycHhgtO/gi7iPDjTdFPUpTs8R/3BwnwxsVNzkuzUv4Njz1nRcICIG8I FddqA8hcGMCUAHg3lFJRaI1TVs2kczlNWtPeNvgeARoFCW2mfkS4WjdoS622bZ8nAl2V rLoFiJ6mmCa1MZbPRtX2X0fcA2Frn+cpaU+65yIzXp3AWJo6q1rWIbUquiWK2e/7B71n Sn7InGXC2SuvfoTsuzgznZG3A6H5YCY3rUuMKPEtZP+jUWWB40mdu4Zx2FOJ3YaZ26jB wKTQ== X-Gm-Message-State: ALyK8tJoQONGgLLGhwgjIwvgEY8o8vOVVj+UYqbDFfxUcYxHLS1BI0ZSYwPGbg/TMsqnius4 X-Received: by 10.98.26.148 with SMTP id a142mr13929589pfa.46.1465859102618; Mon, 13 Jun 2016 16:05:02 -0700 (PDT) Received: from tictac.mtv.corp.google.com ([172.22.65.76]) by smtp.gmail.com with ESMTPSA id pk18sm8906434pab.27.2016.06.13.16.05.00 (version=TLS1_2 cipher=ECDHE-RSA-AES128-SHA bits=128/128); Mon, 13 Jun 2016 16:05:01 -0700 (PDT) From: Douglas Anderson To: ulf.hansson@linaro.org, kishon@ti.com, Heiko Stuebner , robh+dt@kernel.org Cc: shawn.lin@rock-chips.com, xzy.xu@rock-chips.com, briannorris@chromium.org, adrian.hunter@intel.com, linux-rockchip@lists.infradead.org, linux-mmc@vger.kernel.org, devicetree@vger.kernel.org, Douglas Anderson , pawel.moll@arm.com, mark.rutland@arm.com, ijc+devicetree@hellion.org.uk, galak@codeaurora.org, linux-arm-kernel@lists.infradead.org, linux-kernel@vger.kernel.org Subject: [PATCH v2 08/11] Documentation: phy: Let the rockchip eMMC PHY get an exported card clock Date: Mon, 13 Jun 2016 16:04:32 -0700 Message-Id: <1465859076-4868-9-git-send-email-dianders@chromium.org> X-Mailer: git-send-email 2.8.0.rc3.226.g39d4020 In-Reply-To: <1465859076-4868-1-git-send-email-dianders@chromium.org> References: <1465859076-4868-1-git-send-email-dianders@chromium.org> Sender: linux-mmc-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-mmc@vger.kernel.org X-Virus-Scanned: ClamAV using ClamSMTP As of an earlier change in this series ("Documentation: mmc: sdhci-of-arasan: Add ability to export card clock") the SDHCI driver used on Rockchip SoCs can now expose its clock. Let's now specify that the PHY can use it. Letting the PHY get access to this clock means it can adjust phyctrl_frqsel field appropriately. Although the Rockchip PHY appears slightly different than the reference Arasan one, you can see that the Arasan datasheet [1] had it defined as: Select the frequency range of DLL operation: 3b'000 => 200MHz to 170 MHz 3b'001 => 170MHz to 140 MHz 3b'010 => 140MHz to 110 MHz 3b'011 => 110MHz to 80MHz 3b'100 => 80MHz to 50 MHz 3b'101 => 275Mhz to 250MHz 3b'110 => 250MHz to 225MHz 3b'111 => 225MHz to 200MHz On the Rockchip version of the PHY we have less granularity but the idea is the same. [1]: https://arasan.com/wp-content/media/eMMC-5-1-Total-Solution_Rev-1-3.pdf Signed-off-by: Douglas Anderson Acked-by: Rob Herring Reviewed-by: Heiko Stuebner Acked-by: Kishon Vijay Abraham I --- Changes in v2: - List out clocks and clock names (Rob) Documentation/devicetree/bindings/phy/rockchip-emmc-phy.txt | 9 +++++++++ 1 file changed, 9 insertions(+) diff --git a/Documentation/devicetree/bindings/phy/rockchip-emmc-phy.txt b/Documentation/devicetree/bindings/phy/rockchip-emmc-phy.txt index 555cb0f40690..e3ea55763b0a 100644 --- a/Documentation/devicetree/bindings/phy/rockchip-emmc-phy.txt +++ b/Documentation/devicetree/bindings/phy/rockchip-emmc-phy.txt @@ -7,6 +7,13 @@ Required properties: - reg: PHY register address offset and length in "general register files" +Optional clocks using the clock bindings (see ../clock/clock-bindings.txt), +specified by name: + - clock-names: Should contain "emmcclk". Although this is listed as optional + (because most boards can get basic functionality without having + access to it), it is strongly suggested. + - clocks: Should have a phandle to the card clock exported by the SDHCI driver. + Example: @@ -20,6 +27,8 @@ grf: syscon@ff770000 { emmcphy: phy@f780 { compatible = "rockchip,rk3399-emmc-phy"; reg = <0xf780 0x20>; + clocks = <&sdhci>; + clock-names = "emmcclk"; #phy-cells = <0>; }; };