From patchwork Tue Jun 14 15:37:15 2016 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Alan Cooper X-Patchwork-Id: 9176209 Return-Path: Received: from mail.wl.linuxfoundation.org (pdx-wl-mail.web.codeaurora.org [172.30.200.125]) by pdx-korg-patchwork.web.codeaurora.org (Postfix) with ESMTP id 3BBCF6075D for ; Tue, 14 Jun 2016 15:38:15 +0000 (UTC) Received: from mail.wl.linuxfoundation.org (localhost [127.0.0.1]) by mail.wl.linuxfoundation.org (Postfix) with ESMTP id 2F0C221327 for ; Tue, 14 Jun 2016 15:38:15 +0000 (UTC) Received: by mail.wl.linuxfoundation.org (Postfix, from userid 486) id 23F2327E78; Tue, 14 Jun 2016 15:38:15 +0000 (UTC) X-Spam-Checker-Version: SpamAssassin 3.3.1 (2010-03-16) on pdx-wl-mail.web.codeaurora.org X-Spam-Level: X-Spam-Status: No, score=-6.8 required=2.0 tests=BAYES_00, DKIM_ADSP_CUSTOM_MED, DKIM_SIGNED, FREEMAIL_FROM, RCVD_IN_DNSWL_HI, T_DKIM_INVALID autolearn=ham version=3.3.1 Received: from vger.kernel.org (vger.kernel.org [209.132.180.67]) by mail.wl.linuxfoundation.org (Postfix) with ESMTP id E612321327 for ; Tue, 14 Jun 2016 15:38:13 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1751571AbcFNPiN (ORCPT ); Tue, 14 Jun 2016 11:38:13 -0400 Received: from mail-pf0-f193.google.com ([209.85.192.193]:33723 "EHLO mail-pf0-f193.google.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1751842AbcFNPiM (ORCPT ); Tue, 14 Jun 2016 11:38:12 -0400 Received: by mail-pf0-f193.google.com with SMTP id c74so13140614pfb.0 for ; Tue, 14 Jun 2016 08:38:06 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=gmail.com; s=20120113; h=from:to:cc:subject:date:message-id:in-reply-to:references; bh=tV7/9up2kzH9UqYKqi5Z/NCY5lm15Pwv4ObH0weUulM=; b=c9ZywEXGFy6srVkOEaq6IlHpZ894Z7xadTu+bJPWZfnPjqUDSoYWDf6P2P9sq0MF9E e2FGc5lcmS0PY8oTtKrF1gRHXxBTgFVP1uWfxxqWxxLPWMDG4REB4yxdHSg4EdU+/a4K /6sByiNbVg6jtsiXDpmTuyuhhNNhS2zAVQeCUrOnbKzfviLy1OQyhLVl4bz/XxXcYTy6 5IbN7xzpYX5vDRC2ZgkNocfDu6paZBQMxdzzWUQ2NnSU5gB2KBZQPDWh+kYWxalVbr0m ENQv21S0IlkXf6NQeJTd0jqNZoQCbWJVmsScPSbZdK+ytXYX3gcVKAnvGqep9Sc7+vwr qnMg== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20130820; h=x-gm-message-state:from:to:cc:subject:date:message-id:in-reply-to :references; bh=tV7/9up2kzH9UqYKqi5Z/NCY5lm15Pwv4ObH0weUulM=; b=M5aZhu+frUuNs3G8Uc32CXa6F1hxwEceroyY0WRWenQpZh/afZVB0GqlT5lIY6JNjy F/+N8wU9vX/GAN+xarVyKtUVUK1i77lUzd+Otlqmt/wpma3eVduEdUp58HmRv5iaW+7/ BtkVvvVzct2jeYs9FJfkAGDPONpkQVbmmu43pR8o+RfV46Dw0a+1fIQCWw3Ejjf2KgTu BWZHgTIdS9xp2wZWXzCsLzanTfCf40yUrmKzqtWLAvI59Dj9xxBgouR37s7gqi6c3/nw /SR3EfioEbP4KCufZpVVKjauhxaAjqaSk8y5mEO3kB2hGlaP0EgkB0If4aA0e5tUWcCP U8sw== X-Gm-Message-State: ALyK8tJ5JMy0hpgr1aZCriMUgFDhxUNpxraGG2fV0TAcYMNCHi6LWZbeh9umUepEXTsEuA== X-Received: by 10.98.75.146 with SMTP id d18mr4294764pfj.19.1465918680931; Tue, 14 Jun 2016 08:38:00 -0700 (PDT) Received: from lacooper-HPE-470f.and.broadcom.com ([216.31.219.19]) by smtp.gmail.com with ESMTPSA id yp4sm12240149pab.48.2016.06.14.08.37.59 (version=TLS1_2 cipher=ECDHE-RSA-AES128-SHA bits=128/128); Tue, 14 Jun 2016 08:38:00 -0700 (PDT) From: Al Cooper To: ulf.hansson@linaro.org, adrian.hunter@intel.com, linux-mmc@vger.kernel.org, bcm-kernel-feedback-list@broadcom.com Cc: Al Cooper Subject: [PATCH V6 1/2] mmc: sdhci-brcmstb: Add driver for Broadcom BRCMSTB SoCs Date: Tue, 14 Jun 2016 11:37:15 -0400 Message-Id: <1465918636-21034-2-git-send-email-alcooperx@gmail.com> X-Mailer: git-send-email 1.9.1 In-Reply-To: <1465918636-21034-1-git-send-email-alcooperx@gmail.com> References: <1465918636-21034-1-git-send-email-alcooperx@gmail.com> Sender: linux-mmc-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-mmc@vger.kernel.org X-Virus-Scanned: ClamAV using ClamSMTP Add SDHCI driver for Broadcom BRCMSTB SoCs. This driver works with all ARM based SoCs and the 7425, 7429 and 7435 MIPS based SoCs. The driver disables all UHS speed modes by default and relies on the Device Tree node properties to enable these modes for SoC/Board combinations that support them. Signed-off-by: Al Cooper Acked-by: Adrian Hunter --- MAINTAINERS | 7 ++ drivers/mmc/host/Kconfig | 11 +++ drivers/mmc/host/Makefile | 1 + drivers/mmc/host/sdhci-brcmstb.c | 143 +++++++++++++++++++++++++++++++++++++++ 4 files changed, 162 insertions(+) create mode 100644 drivers/mmc/host/sdhci-brcmstb.c diff --git a/MAINTAINERS b/MAINTAINERS index a929db8..5b76de9 100644 --- a/MAINTAINERS +++ b/MAINTAINERS @@ -10190,6 +10190,13 @@ F: tools/testing/selftests/seccomp/* K: \bsecure_computing K: \bTIF_SECCOMP\b +SECURE DIGITAL HOST CONTROLLER INTERFACE (SDHCI) Broadcom BRCMSTB DRIVER +M: Al Cooper +L: linux-mmc@vger.kernel.org +L: bcm-kernel-feedback-list@broadcom.com +S: Maintained +F: drivers/mmc/host/sdhci-brcmstb* + SECURE DIGITAL HOST CONTROLLER INTERFACE (SDHCI) SAMSUNG DRIVER M: Ben Dooks M: Jaehoon Chung diff --git a/drivers/mmc/host/Kconfig b/drivers/mmc/host/Kconfig index 0aa484c..1038c9a 100644 --- a/drivers/mmc/host/Kconfig +++ b/drivers/mmc/host/Kconfig @@ -798,3 +798,14 @@ config MMC_SDHCI_MICROCHIP_PIC32 If you have a controller with this interface, say Y or M here. If unsure, say N. +config MMC_SDHCI_BRCMSTB + tristate "Broadcom SDIO/SD/MMC support" + depends on ARCH_BRCMSTB || BMIPS_GENERIC + depends on MMC_SDHCI_PLTFM + default y + select MMC_SDHCI_IO_ACCESSORS + help + This selects support for the SDIO/SD/MMC Host Controller on + Broadcom STB SoCs. + + If unsure, say Y. diff --git a/drivers/mmc/host/Makefile b/drivers/mmc/host/Makefile index af918d2..2075c11 100644 --- a/drivers/mmc/host/Makefile +++ b/drivers/mmc/host/Makefile @@ -76,6 +76,7 @@ obj-$(CONFIG_MMC_SDHCI_IPROC) += sdhci-iproc.o obj-$(CONFIG_MMC_SDHCI_MSM) += sdhci-msm.o obj-$(CONFIG_MMC_SDHCI_ST) += sdhci-st.o obj-$(CONFIG_MMC_SDHCI_MICROCHIP_PIC32) += sdhci-pic32.o +obj-$(CONFIG_MMC_SDHCI_BRCMSTB) += sdhci-brcmstb.o ifeq ($(CONFIG_CB710_DEBUG),y) CFLAGS-cb710-mmc += -DDEBUG diff --git a/drivers/mmc/host/sdhci-brcmstb.c b/drivers/mmc/host/sdhci-brcmstb.c new file mode 100644 index 0000000..cce10fe --- /dev/null +++ b/drivers/mmc/host/sdhci-brcmstb.c @@ -0,0 +1,143 @@ +/* + * sdhci-brcmstb.c Support for SDHCI on Broadcom BRCMSTB SoC's + * + * Copyright (C) 2015 Broadcom Corporation + * + * This program is free software; you can redistribute it and/or modify + * it under the terms of the GNU General Public License version 2 as + * published by the Free Software Foundation. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + * + */ + +#include +#include +#include +#include + +#include "sdhci-pltfm.h" + +#ifdef CONFIG_PM_SLEEP + +static int sdhci_brcmstb_suspend(struct device *dev) +{ + struct sdhci_host *host = dev_get_drvdata(dev); + struct sdhci_pltfm_host *pltfm_host = sdhci_priv(host); + int res; + + res = sdhci_suspend_host(host); + if (res) + return res; + clk_disable_unprepare(pltfm_host->clk); + return res; +} + +static int sdhci_brcmstb_resume(struct device *dev) +{ + struct sdhci_host *host = dev_get_drvdata(dev); + struct sdhci_pltfm_host *pltfm_host = sdhci_priv(host); + int err; + + err = clk_prepare_enable(pltfm_host->clk); + if (err) + return err; + return sdhci_resume_host(host); +} + +#endif /* CONFIG_PM_SLEEP */ + +static SIMPLE_DEV_PM_OPS(sdhci_brcmstb_pmops, sdhci_brcmstb_suspend, + sdhci_brcmstb_resume); + +static const struct sdhci_ops sdhci_brcmstb_ops = { + .set_clock = sdhci_set_clock, + .set_bus_width = sdhci_set_bus_width, + .reset = sdhci_reset, + .set_uhs_signaling = sdhci_set_uhs_signaling, +}; + +static struct sdhci_pltfm_data sdhci_brcmstb_pdata = { + .ops = &sdhci_brcmstb_ops, +}; + +static int sdhci_brcmstb_probe(struct platform_device *pdev) +{ + struct sdhci_host *host; + struct sdhci_pltfm_host *pltfm_host; + struct clk *clk; + int res; + + clk = devm_clk_get(&pdev->dev, NULL); + if (IS_ERR(clk)) { + dev_err(&pdev->dev, "Clock not found in Device Tree\n"); + clk = NULL; + } + res = clk_prepare_enable(clk); + if (res) + return res; + + host = sdhci_pltfm_init(pdev, &sdhci_brcmstb_pdata, 0); + if (IS_ERR(host)) { + res = PTR_ERR(host); + goto err_clk; + } + + /* Enable MMC_CAP2_HC_ERASE_SZ for better max discard calculations */ + host->mmc->caps2 |= MMC_CAP2_HC_ERASE_SZ; + + sdhci_get_of_property(pdev); + mmc_of_parse(host->mmc); + + /* + * Supply the existing CAPS, but clear the UHS modes. This + * will allow these modes to be specified by device tree + * properties through mmc_of_parse(). + */ + host->caps = sdhci_readl(host, SDHCI_CAPABILITIES); + host->caps1 = sdhci_readl(host, SDHCI_CAPABILITIES_1); + host->caps1 &= ~(SDHCI_SUPPORT_SDR50 | SDHCI_SUPPORT_SDR104 | + SDHCI_SUPPORT_DDR50); + host->quirks |= SDHCI_QUIRK_MISSING_CAPS | + SDHCI_QUIRK_BROKEN_TIMEOUT_VAL; + + res = sdhci_add_host(host); + if (res) + goto err; + + pltfm_host = sdhci_priv(host); + pltfm_host->clk = clk; + return res; + +err: + sdhci_pltfm_free(pdev); +err_clk: + clk_disable_unprepare(clk); + return res; +} + +static const struct of_device_id sdhci_brcm_of_match[] = { + { .compatible = "brcm,bcm7425-sdhci" }, + {}, +}; +MODULE_DEVICE_TABLE(of, sdhci_brcm_of_match); + +static struct platform_driver sdhci_brcmstb_driver = { + .driver = { + .name = "sdhci-brcmstb", + .owner = THIS_MODULE, + .pm = &sdhci_brcmstb_pmops, + .of_match_table = of_match_ptr(sdhci_brcm_of_match), + }, + .probe = sdhci_brcmstb_probe, + .remove = sdhci_pltfm_unregister, +}; + +module_platform_driver(sdhci_brcmstb_driver); + +MODULE_DESCRIPTION("SDHCI driver for Broadcom BRCMSTB SoCs"); +MODULE_AUTHOR("Broadcom"); +MODULE_LICENSE("GPL v2");