From patchwork Wed Jun 15 13:01:13 2016 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Ritesh Harjani X-Patchwork-Id: 9178513 Return-Path: Received: from mail.wl.linuxfoundation.org (pdx-wl-mail.web.codeaurora.org [172.30.200.125]) by pdx-korg-patchwork.web.codeaurora.org (Postfix) with ESMTP id 1E1B26021C for ; Wed, 15 Jun 2016 13:03:13 +0000 (UTC) Received: from mail.wl.linuxfoundation.org (localhost [127.0.0.1]) by mail.wl.linuxfoundation.org (Postfix) with ESMTP id 0E9862012F for ; Wed, 15 Jun 2016 13:03:13 +0000 (UTC) Received: by mail.wl.linuxfoundation.org (Postfix, from userid 486) id 0305827C26; Wed, 15 Jun 2016 13:03:12 +0000 (UTC) X-Spam-Checker-Version: SpamAssassin 3.3.1 (2010-03-16) on pdx-wl-mail.web.codeaurora.org X-Spam-Level: X-Spam-Status: No, score=-6.9 required=2.0 tests=BAYES_00,RCVD_IN_DNSWL_HI autolearn=ham version=3.3.1 Received: from vger.kernel.org (vger.kernel.org [209.132.180.67]) by mail.wl.linuxfoundation.org (Postfix) with ESMTP id CF3482012F for ; Wed, 15 Jun 2016 13:03:11 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1753355AbcFONDK (ORCPT ); Wed, 15 Jun 2016 09:03:10 -0400 Received: from smtp.codeaurora.org ([198.145.29.96]:43791 "EHLO smtp.codeaurora.org" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1753154AbcFONDJ (ORCPT ); Wed, 15 Jun 2016 09:03:09 -0400 Received: by smtp.codeaurora.org (Postfix, from userid 1000) id 2E48F6124D; Wed, 15 Jun 2016 13:03:09 +0000 (UTC) Received: from rharjani-linux.qualcomm.com (unknown [202.46.23.54]) (using TLSv1.1 with cipher ECDHE-RSA-AES256-SHA (256/256 bits)) (No client certificate requested) (Authenticated sender: riteshh@smtp.codeaurora.org) by smtp.codeaurora.org (Postfix) with ESMTPSA id 83AF961457; Wed, 15 Jun 2016 13:03:03 +0000 (UTC) From: Ritesh Harjani To: ulf.hansson@linaro.org, linux-mmc@vger.kernel.org Cc: adrian.hunter@intel.com, alex.lemberg@sandisk.com, mateusz.nowak@intel.com, Yuliy.Izrailov@sandisk.com, jh80.chung@samsung.com, dongas86@gmail.com, asutoshd@codeaurora.org, zhangfei.gao@gmail.com, sthumma@codeaurora.org, kdorfman@codeaurora.org, david.griego@linaro.org, stummala@codeaurora.org, venkatg@codeaurora.org, Ritesh Harjani Subject: [PATCH RFC 09/10] mmc: cmdq-host: add halt support to command queue host Date: Wed, 15 Jun 2016 18:31:13 +0530 Message-Id: <1465995674-15816-10-git-send-email-riteshh@codeaurora.org> X-Mailer: git-send-email 1.8.2.1 In-Reply-To: <1465995674-15816-1-git-send-email-riteshh@codeaurora.org> References: <1465995674-15816-1-git-send-email-riteshh@codeaurora.org> Sender: linux-mmc-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-mmc@vger.kernel.org X-Virus-Scanned: ClamAV using ClamSMTP From: Asutosh Das Halt can be used in error cases to get control of the bus. This is used to remove a task from device queue and/or other recovery mechanisms. Signed-off-by: Asutosh Das Signed-off-by: Venkat Gopalakrishnan [riteshh@codeaurora.org: fixed merge conflicts] Signed-off-by: Ritesh Harjani --- drivers/mmc/host/cmdq_hci.c | 35 +++++++++++++++++++++++++++++++++++ 1 file changed, 35 insertions(+) diff --git a/drivers/mmc/host/cmdq_hci.c b/drivers/mmc/host/cmdq_hci.c index 68c8e03..64be0ce 100644 --- a/drivers/mmc/host/cmdq_hci.c +++ b/drivers/mmc/host/cmdq_hci.c @@ -29,6 +29,9 @@ #define DCMD_SLOT 31 #define NUM_SLOTS 32 +/* 1 sec */ +#define HALT_TIMEOUT_MS 1000 + static inline u8 *get_desc(struct cmdq_host *cq_host, u8 tag) { return cq_host->desc_base + (tag * cq_host->slot_sz); @@ -570,11 +573,42 @@ irqreturn_t cmdq_irq(struct mmc_host *mmc, u32 intmask) cmdq_dumpregs(cq_host); } + if (status & CQIS_HAC) { + /* halt is completed, wakeup waiting thread */ + complete(&cq_host->halt_comp); + } + out: return IRQ_HANDLED; } EXPORT_SYMBOL(cmdq_irq); +/* May sleep */ +static int cmdq_halt(struct mmc_host *mmc, bool halt) +{ + struct cmdq_host *cq_host = (struct cmdq_host *)mmc_cmdq_private(mmc); + u32 val; + + if (halt) { + cmdq_writel(cq_host, cmdq_readl(cq_host, CQCTL) | HALT, + CQCTL); + val = wait_for_completion_timeout(&cq_host->halt_comp, + msecs_to_jiffies(HALT_TIMEOUT_MS)); + /* halt done: re-enable legacy interrupts */ + if (cq_host->ops->clear_set_irqs) + cq_host->ops->clear_set_irqs(mmc, false); + + return val ? 0 : -ETIMEDOUT; + } else { + if (cq_host->ops->clear_set_irqs) + cq_host->ops->clear_set_irqs(mmc, true); + cmdq_writel(cq_host, cmdq_readl(cq_host, CQCTL) & ~HALT, + CQCTL); + } + + return 0; +} + static void cmdq_post_req(struct mmc_host *host, struct mmc_request *mrq, int err) { @@ -597,6 +631,7 @@ static const struct mmc_cmdq_host_ops cmdq_host_ops = { .disable = cmdq_disable, .request = cmdq_request, .post_req = cmdq_post_req, + .halt = cmdq_halt, }; struct cmdq_host *cmdq_pltfm_init(struct platform_device *pdev)