From patchwork Mon Jun 20 04:25:49 2016 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Jaehoon Chung X-Patchwork-Id: 9186563 Return-Path: Received: from mail.wl.linuxfoundation.org (pdx-wl-mail.web.codeaurora.org [172.30.200.125]) by pdx-korg-patchwork.web.codeaurora.org (Postfix) with ESMTP id A7FC46075F for ; Mon, 20 Jun 2016 04:26:56 +0000 (UTC) Received: from mail.wl.linuxfoundation.org (localhost [127.0.0.1]) by mail.wl.linuxfoundation.org (Postfix) with ESMTP id 9229422BF1 for ; Mon, 20 Jun 2016 04:26:56 +0000 (UTC) Received: by mail.wl.linuxfoundation.org (Postfix, from userid 486) id 8399B23B3C; Mon, 20 Jun 2016 04:26:56 +0000 (UTC) X-Spam-Checker-Version: SpamAssassin 3.3.1 (2010-03-16) on pdx-wl-mail.web.codeaurora.org X-Spam-Level: X-Spam-Status: No, score=-6.9 required=2.0 tests=BAYES_00,RCVD_IN_DNSWL_HI autolearn=ham version=3.3.1 Received: from vger.kernel.org (vger.kernel.org [209.132.180.67]) by mail.wl.linuxfoundation.org (Postfix) with ESMTP id E8E0122F4A for ; Mon, 20 Jun 2016 04:26:55 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1751549AbcFTE0x (ORCPT ); Mon, 20 Jun 2016 00:26:53 -0400 Received: from mailout4.samsung.com ([203.254.224.34]:55688 "EHLO mailout4.samsung.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1751559AbcFTE0v (ORCPT ); Mon, 20 Jun 2016 00:26:51 -0400 Received: from epcpsbgr2.samsung.com (u142.gpu120.samsung.co.kr [203.254.230.142]) by mailout4.samsung.com (Oracle Communications Messaging Server 7.0.5.31.0 64bit (built May 5 2014)) with ESMTP id <0O9102VFIYZ3KSC0@mailout4.samsung.com> for linux-mmc@vger.kernel.org; Mon, 20 Jun 2016 13:25:51 +0900 (KST) Received: from epcpsbgm1new.samsung.com ( [172.20.52.112]) by epcpsbgr2.samsung.com (EPCPMTA) with SMTP id F2.E0.05160.F4077675; Mon, 20 Jun 2016 13:25:51 +0900 (KST) X-AuditID: cbfee68e-f79266d000001428-39-5767704fa38a Received: from epmmp2 ( [203.254.227.17]) by epcpsbgm1new.samsung.com (EPCPMTA) with SMTP id B9.5E.02101.F4077675; Mon, 20 Jun 2016 13:25:51 +0900 (KST) Received: from localhost.localdomain ([10.113.62.216]) by mmp2.samsung.com (Oracle Communications Messaging Server 7.0.5.31.0 64bit (built May 5 2014)) with ESMTPA id <0O91005F8YZ3DJ40@mmp2.samsung.com>; Mon, 20 Jun 2016 13:25:51 +0900 (KST) From: Jaehoon Chung To: linux-mmc@vger.kernel.org Cc: ulf.hansson@linaro.org, shawn.lin@rock-chips.com, Jaehoon Chung Subject: [PATCH 2/3] mmc: dw_mmc: add the card write threshold for HS400 mode Date: Mon, 20 Jun 2016 13:25:49 +0900 Message-id: <1466396749-29456-1-git-send-email-jh80.chung@samsung.com> X-Mailer: git-send-email 1.9.1 X-Brightmail-Tracker: H4sIAAAAAAAAA+NgFlrPLMWRmVeSWpSXmKPExsWyRsSkQNe/ID3cYEeDscWNX22sFkf+9zNa 3HmyntXi+NpwBxaPO9f2sHn8nbWfxaNvyypGj8+b5AJYorhsUlJzMstSi/TtErgyLhy/z1hw RqriwO3bbA2Mz0S7GDk5JARMJOa0HGWBsMUkLtxbz9bFyMUhJLCCUWJ152lGmKIN02awQyRm MUpM65/FCOH8YJToOLodrIpNQEdi+7fjTCC2iICsxM8/F9hAbGaBOIlFR3+yg9jCAr4Se2Z/ YgaxWQRUJfaf+ghm8wq4STRd2gx1hpzEyWOTWUEWSAg8Z5NYOec+C0SDgMS3yYeAbA6ghKzE pgPMEPWSEgdX3GCZwCi4gJFhFaNoakFyQXFSepGRXnFibnFpXrpecn7uJkZgOJ7+96xvB+PN A9aHGAU4GJV4eC3OpoULsSaWFVfmHmI0BdowkVlKNDkfGPR5JfGGxmZGFqYmpsZG5pZmSuK8 CVI/g4UE0hNLUrNTUwtSi+KLSnNSiw8xMnFwSjUwzq/4l/nvN8eWi21Fn1+Wb/RS9V+tu+Tp 5AvPj3LdKhLrZwmx4Jxa8iI/YBvfPLOrNz/KXe7OuXbMWuVIZmbrEba4vU/Uf++ee1327ty/ fxNWexVIndeT2qz999Fbz2NTDjezKdf9mK42UWCOcG/hvQ+mBSZnGlJEok/apzGesZNQin1/ 7tMMNSWW4oxEQy3mouJEAKkWe6tCAgAA X-Brightmail-Tracker: H4sIAAAAAAAAA+NgFvrDLMWRmVeSWpSXmKPExsVy+t9jQV3/gvRwg18vdC1u/GpjtTjyv5/R 4s6T9awWx9eGO7B43Lm2h83j76z9LB59W1YxenzeJBfAEtXAaJORmpiSWqSQmpecn5KZl26r 5B0c7xxvamZgqGtoaWGupJCXmJtqq+TiE6DrlpkDtFJJoSwxpxQoFJBYXKykb4dpQmiIm64F TGOErm9IEFyPkQEaSFjDmHHh+H3GgjNSFQdu32ZrYHwm2sXIySEhYCKxYdoMdghbTOLCvfVs XYxcHEICsxglpvXPYoRwfjBKdBzdzghSxSagI7H923EmEFtEQFbi558LbCA2s0CcxKKjP8Em CQv4SuyZ/YkZxGYRUJXYf+ojmM0r4CbRdGkzC8Q2OYmTxyazTmDkXsDIsIpRIrUguaA4KT3X MC+1XK84Mbe4NC9dLzk/dxMjOOSfSe1gPLjL/RCjAAejEg+vgEN6uBBrYllxZe4hRgkOZiUR 3lW5QCHelMTKqtSi/Pii0pzU4kOMpkAHTGSWEk3OB8ZjXkm8obGJmZGlkbmhhZGxuZI47+P/ 68KEBNITS1KzU1MLUotg+pg4OKUaGE8tmJxzw2Jy91VNz5MJQkfNDH9teSHx5DGDH09Re9L2 K8mbf9+JNlezMTqx/75X6RJV9QKf7y7yN9X11S3P7TfZHH9+6Tx+MyvxBcu3HLqz/HJnyt5b s7dvu1iXph1xVfisUYDkum8MMdM15gX7Hliz+q/mw3PJ4bdSaq84MtxvZKjPCnP2WKLEUpyR aKjFXFScCACtSaRIjwIAAA== DLP-Filter: Pass X-MTR: 20000000000000000@CPGS X-CFilter-Loop: Reflected Sender: linux-mmc-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-mmc@vger.kernel.org X-Virus-Scanned: ClamAV using ClamSMTP Since v2.80a, dwmmc controller introduced the card write threshold for HS400 mode. So CardThrCtl can be supported during write operation, not only read operation. (Note: Only use the write threshold when mode is HS400.) To use more compatible, removed "_rd_" from function name. Signed-off-by: Jaehoon Chung --- drivers/mmc/host/dw_mmc.c | 31 +++++++++++++++++++++---------- drivers/mmc/host/dw_mmc.h | 5 ++++- 2 files changed, 25 insertions(+), 11 deletions(-) diff --git a/drivers/mmc/host/dw_mmc.c b/drivers/mmc/host/dw_mmc.c index 5cf143b..6efda0b 100644 --- a/drivers/mmc/host/dw_mmc.c +++ b/drivers/mmc/host/dw_mmc.c @@ -899,13 +899,12 @@ done: mci_writel(host, FIFOTH, fifoth_val); } -static void dw_mci_ctrl_rd_thld(struct dw_mci *host, struct mmc_data *data) +static void dw_mci_ctrl_thld(struct dw_mci *host, struct mmc_data *data) { unsigned int blksz = data->blksz; u32 blksz_depth, fifo_depth; u16 thld_size; - - WARN_ON(!(data->flags & MMC_DATA_READ)); + u8 enable; /* * CDTHRCTL doesn't exist prior to 240A (in fact that register offset is @@ -914,8 +913,20 @@ static void dw_mci_ctrl_rd_thld(struct dw_mci *host, struct mmc_data *data) if (host->verid < DW_MMC_240A) return; + /* + * Card write Threshold is introduced since 2.80a + * It's used when HS400 mode is enabled. + */ + if (data->flags & MMC_DATA_WRITE && + !(host->timing != MMC_TIMING_MMC_HS400)) + return; + + if (data->flags & MMC_DATA_WRITE) + enable = SDMMC_CARD_WR_THR_EN; + else + enable = SDMMC_CARD_RD_THR_EN; + if (host->timing != MMC_TIMING_MMC_HS200 && - host->timing != MMC_TIMING_MMC_HS400 && host->timing != MMC_TIMING_UHS_SDR104) goto disable; @@ -931,11 +942,11 @@ static void dw_mci_ctrl_rd_thld(struct dw_mci *host, struct mmc_data *data) * Currently just choose blksz. */ thld_size = blksz; - mci_writel(host, CDTHRCTL, SDMMC_SET_RD_THLD(thld_size, 1)); + mci_writel(host, CDTHRCTL, SDMMC_SET_THLD(thld_size, enable)); return; disable: - mci_writel(host, CDTHRCTL, SDMMC_SET_RD_THLD(0, 0)); + mci_writel(host, CDTHRCTL, 0); } static int dw_mci_submit_data_dma(struct dw_mci *host, struct mmc_data *data) @@ -1006,12 +1017,12 @@ static void dw_mci_submit_data(struct dw_mci *host, struct mmc_data *data) host->sg = NULL; host->data = data; - if (data->flags & MMC_DATA_READ) { + if (data->flags & MMC_DATA_READ) host->dir_status = DW_MCI_RECV_STATUS; - dw_mci_ctrl_rd_thld(host, data); - } else { + else host->dir_status = DW_MCI_SEND_STATUS; - } + + dw_mci_ctrl_thld(host, data); if (dw_mci_submit_data_dma(host, data)) { if (host->data->flags & MMC_DATA_READ) diff --git a/drivers/mmc/host/dw_mmc.h b/drivers/mmc/host/dw_mmc.h index 1e8d838..2bf7464 100644 --- a/drivers/mmc/host/dw_mmc.h +++ b/drivers/mmc/host/dw_mmc.h @@ -175,7 +175,10 @@ /* Version ID register define */ #define SDMMC_GET_VERID(x) ((x) & 0xFFFF) /* Card read threshold */ -#define SDMMC_SET_RD_THLD(v, x) (((v) & 0xFFF) << 16 | (x)) +#define SDMMC_SET_THLD(v, x) (((v) & 0xFFF) << 16 | (x)) +#define SDMMC_CARD_WR_THR_EN BIT(2) +#define SDMMC_CARD_RD_THR_EN BIT(0) +/* UHS-1 register defines */ #define SDMMC_UHS_18V BIT(0) /* All ctrl reset bits */ #define SDMMC_CTRL_ALL_RESET_FLAGS \