From patchwork Wed Jun 29 13:24:16 2016 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Adrian Hunter X-Patchwork-Id: 9205145 Return-Path: Received: from mail.wl.linuxfoundation.org (pdx-wl-mail.web.codeaurora.org [172.30.200.125]) by pdx-korg-patchwork.web.codeaurora.org (Postfix) with ESMTP id 8BD906075F for ; Wed, 29 Jun 2016 13:29:34 +0000 (UTC) Received: from mail.wl.linuxfoundation.org (localhost [127.0.0.1]) by mail.wl.linuxfoundation.org (Postfix) with ESMTP id 7B6DB28630 for ; Wed, 29 Jun 2016 13:29:34 +0000 (UTC) Received: by mail.wl.linuxfoundation.org (Postfix, from userid 486) id 7045A28665; Wed, 29 Jun 2016 13:29:34 +0000 (UTC) X-Spam-Checker-Version: SpamAssassin 3.3.1 (2010-03-16) on pdx-wl-mail.web.codeaurora.org X-Spam-Level: X-Spam-Status: No, score=-6.9 required=2.0 tests=BAYES_00,RCVD_IN_DNSWL_HI autolearn=ham version=3.3.1 Received: from vger.kernel.org (vger.kernel.org [209.132.180.67]) by mail.wl.linuxfoundation.org (Postfix) with ESMTP id 5D9A728630 for ; Wed, 29 Jun 2016 13:29:33 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1752043AbcF2N3c (ORCPT ); Wed, 29 Jun 2016 09:29:32 -0400 Received: from mga01.intel.com ([192.55.52.88]:35817 "EHLO mga01.intel.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1751982AbcF2N3c (ORCPT ); Wed, 29 Jun 2016 09:29:32 -0400 Received: from fmsmga003.fm.intel.com ([10.253.24.29]) by fmsmga101.fm.intel.com with ESMTP; 29 Jun 2016 06:29:30 -0700 X-ExtLoop1: 1 X-IronPort-AV: E=Sophos;i="5.26,546,1459839600"; d="scan'208";a="726825353" Received: from ahunter-desktop.fi.intel.com ([10.237.72.168]) by FMSMGA003.fm.intel.com with ESMTP; 29 Jun 2016 06:29:27 -0700 From: Adrian Hunter To: Ulf Hansson Cc: linux-mmc , Alex Lemberg , Mateusz Nowak , Yuliy Izrailov , Jaehoon Chung , Dong Aisheng , Das Asutosh , Zhangfei Gao , Dorfman Konstantin , David Griego , Sahitya Tummala , Harjani Ritesh , Venu Byravarasu Subject: [PATCH V2 03/54] mmc: sdhci: Make signal voltage support explicit Date: Wed, 29 Jun 2016 16:24:16 +0300 Message-Id: <1467206707-30185-4-git-send-email-adrian.hunter@intel.com> X-Mailer: git-send-email 1.9.1 In-Reply-To: <1467206707-30185-1-git-send-email-adrian.hunter@intel.com> References: <1467206707-30185-1-git-send-email-adrian.hunter@intel.com> Organization: Intel Finland Oy, Registered Address: PL 281, 00181 Helsinki, Business Identity Code: 0357606 - 4, Domiciled in Helsinki Sender: linux-mmc-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-mmc@vger.kernel.org X-Virus-Scanned: ClamAV using ClamSMTP Signal voltage support is not a quirk, it is a capability. According to the SDHCI specification, support for 1.8V signaling is determined by the presence of one of the capability bits SDHCI_SUPPORT_SDR50, SDHCI_SUPPORT_SDR104, or SDHCI_SUPPORT_DDR50. This is complicated by also supporting eMMC which has 1.8V modes and 1.2V modes. It would be possible to use the transfer mode to determine signal voltage support, except for eMMC DDR52 mode which uses the same capability (MMC_CAP_1_8V_DDR) for 1.8V signaling and 3V signaling. In addition, the mmc core will fail over from one signaling voltage to the next (refer mmc_power_up()) which means SDHCI really needs to validate which voltages are actually supported. Introduce SDHCI flags for signal voltage support and set them based on the supported transfer modes. In general, drivers should prefer to set the supported transfer modes correctly rather than change the signal voltage capability, except in the case where 3V DDR52 is supported but 1.8V is not. Signed-off-by: Adrian Hunter --- drivers/mmc/host/sdhci.c | 17 +++++++++++++++++ drivers/mmc/host/sdhci.h | 3 +++ 2 files changed, 20 insertions(+) diff --git a/drivers/mmc/host/sdhci.c b/drivers/mmc/host/sdhci.c index 22061faf7fa4..8ac5a9df2c01 100644 --- a/drivers/mmc/host/sdhci.c +++ b/drivers/mmc/host/sdhci.c @@ -1733,6 +1733,8 @@ static int sdhci_start_signal_voltage_switch(struct mmc_host *mmc, switch (ios->signal_voltage) { case MMC_SIGNAL_VOLTAGE_330: + if (!(host->flags & SDHCI_SIGNALING_330)) + return -EINVAL; /* Set 1.8V Signal Enable in the Host Control2 register to 0 */ ctrl &= ~SDHCI_CTRL_VDD_180; sdhci_writew(host, ctrl, SDHCI_HOST_CONTROL2); @@ -1759,6 +1761,8 @@ static int sdhci_start_signal_voltage_switch(struct mmc_host *mmc, return -EAGAIN; case MMC_SIGNAL_VOLTAGE_180: + if (!(host->flags & SDHCI_SIGNALING_180)) + return -EINVAL; if (!IS_ERR(mmc->supply.vqmmc)) { ret = regulator_set_voltage(mmc->supply.vqmmc, 1700000, 1950000); @@ -1790,6 +1794,8 @@ static int sdhci_start_signal_voltage_switch(struct mmc_host *mmc, return -EAGAIN; case MMC_SIGNAL_VOLTAGE_120: + if (!(host->flags & SDHCI_SIGNALING_120)) + return -EINVAL; if (!IS_ERR(mmc->supply.vqmmc)) { ret = regulator_set_voltage(mmc->supply.vqmmc, 1100000, 1300000); @@ -2798,6 +2804,8 @@ struct sdhci_host *sdhci_alloc_host(struct device *dev, host->mmc_host_ops = sdhci_ops; mmc->ops = &host->mmc_host_ops; + host->flags = SDHCI_SIGNALING_330; + return host; } @@ -3257,6 +3265,15 @@ int sdhci_setup_host(struct sdhci_host *host) goto unreg; } + if ((mmc->caps & (MMC_CAP_UHS_SDR12 | MMC_CAP_UHS_SDR25 | + MMC_CAP_UHS_SDR50 | MMC_CAP_UHS_SDR104 | + MMC_CAP_UHS_DDR50 | MMC_CAP_1_8V_DDR)) || + (mmc->caps2 & (MMC_CAP2_HS200_1_8V_SDR | MMC_CAP2_HS400_1_8V))) + host->flags |= SDHCI_SIGNALING_180; + + if (mmc->caps2 & MMC_CAP2_HSX00_1_2V) + host->flags |= SDHCI_SIGNALING_120; + spin_lock_init(&host->lock); /* diff --git a/drivers/mmc/host/sdhci.h b/drivers/mmc/host/sdhci.h index b16aec2faa2e..419911f107d3 100644 --- a/drivers/mmc/host/sdhci.h +++ b/drivers/mmc/host/sdhci.h @@ -447,6 +447,9 @@ struct sdhci_host { #define SDHCI_SDIO_IRQ_ENABLED (1<<9) /* SDIO irq enabled */ #define SDHCI_USE_64_BIT_DMA (1<<12) /* Use 64-bit DMA */ #define SDHCI_HS400_TUNING (1<<13) /* Tuning for HS400 */ +#define SDHCI_SIGNALING_330 (1<<14) /* Host is capable of 3.3V signaling */ +#define SDHCI_SIGNALING_180 (1<<15) /* Host is capable of 1.8V signaling */ +#define SDHCI_SIGNALING_120 (1<<16) /* Host is capable of 1.2V signaling */ unsigned int version; /* SDHCI spec. version */