@@ -434,6 +434,8 @@
interrupt-names = "hc_irq", "pwr_irq";
clocks = <&gcc GCC_SDCC1_APPS_CLK>, <&gcc GCC_SDCC1_AHB_CLK>;
clock-names = "core", "iface";
+ clk-rates = <400000 25000000 50000000 100000000
+ 200000000>;
status = "disabled";
};
@@ -445,6 +447,8 @@
interrupt-names = "hc_irq", "pwr_irq";
clocks = <&gcc GCC_SDCC2_APPS_CLK>, <&gcc GCC_SDCC2_AHB_CLK>;
clock-names = "core", "iface";
+ clk-rates = <400000 25000000 50000000 100000000
+ 200000000>;
status = "disabled";
};
@@ -566,6 +566,8 @@
interrupt-names = "hc_irq", "pwr_irq";
clocks = <&gcc GCC_SDCC1_APPS_CLK>, <&gcc GCC_SDCC1_AHB_CLK>;
clock-names = "core", "iface";
+ clk-rates = <400000 25000000 50000000 100000000
+ 200000000>;
status = "disabled";
};
@@ -577,6 +579,8 @@
interrupt-names = "hc_irq", "pwr_irq";
clocks = <&gcc GCC_SDCC2_APPS_CLK>, <&gcc GCC_SDCC2_AHB_CLK>;
clock-names = "core", "iface";
+ clk-rates = <400000 25000000 50000000 100000000
+ 200000000>;
status = "disabled";
};
@@ -512,6 +512,8 @@
clocks = <&gcc GCC_SDCC1_APPS_CLK>,
<&gcc GCC_SDCC1_AHB_CLK>;
clock-names = "core", "iface";
+ clk-rates = <400000 25000000 50000000 100000000
+ 177770000>;
bus-width = <8>;
non-removable;
status = "disabled";
@@ -527,6 +529,8 @@
clocks = <&gcc GCC_SDCC2_APPS_CLK>,
<&gcc GCC_SDCC2_AHB_CLK>;
clock-names = "core", "iface";
+ clk-rates = <400000 25000000 50000000 100000000
+ 200000000>;
bus-width = <4>;
status = "disabled";
};
@@ -410,6 +410,8 @@
clock-names = "iface", "core";
clocks = <&gcc GCC_SDCC2_AHB_CLK>,
<&gcc GCC_SDCC2_APPS_CLK>;
+ clk-rates = <400000 25000000 50000000 100000000
+ 200000000>;
bus-width = <4>;
};
Add msm supported clk-rates for all sdhc nodes. Signed-off-by: Ritesh Harjani <riteshh@codeaurora.org> --- arch/arm/boot/dts/qcom-apq8084.dtsi | 4 ++++ arch/arm/boot/dts/qcom-msm8974.dtsi | 4 ++++ arch/arm64/boot/dts/qcom/msm8916.dtsi | 4 ++++ arch/arm64/boot/dts/qcom/msm8996.dtsi | 2 ++ 4 files changed, 14 insertions(+)