diff mbox

[1/2] mmc: sdhci-esdhc: clean up register definitions

Message ID 1480046451-29492-1-git-send-email-yangbo.lu@nxp.com (mailing list archive)
State Superseded, archived
Headers show

Commit Message

Yangbo Lu Nov. 25, 2016, 4 a.m. UTC 
The eSDHC register definitions in header file were messy and confusing.
This patch is to clean up these definitions.

Signed-off-by: Yangbo Lu <yangbo.lu@nxp.com>
---
 drivers/mmc/host/sdhci-esdhc.h | 39 ++++++++++++++++++++-------------------
 1 file changed, 20 insertions(+), 19 deletions(-)

Comments

Yangbo Lu Dec. 2, 2016, 2:36 a.m. UTC | #1 
Any comments on this patchset?
Thanks.


Best regards,
Yangbo Lu

> -----Original Message-----
> From: Yangbo Lu [mailto:yangbo.lu@nxp.com]
> Sent: Friday, November 25, 2016 12:01 PM
> To: linux-mmc@vger.kernel.org; ulf.hansson@linaro.org
> Cc: Xiaobo Xie; Y.B. Lu
> Subject: [PATCH 1/2] mmc: sdhci-esdhc: clean up register definitions
> 
> The eSDHC register definitions in header file were messy and confusing.
> This patch is to clean up these definitions.
> 
> Signed-off-by: Yangbo Lu <yangbo.lu@nxp.com>
> ---
>  drivers/mmc/host/sdhci-esdhc.h | 39 ++++++++++++++++++++----------------
> ---
>  1 file changed, 20 insertions(+), 19 deletions(-)
> 
> diff --git a/drivers/mmc/host/sdhci-esdhc.h b/drivers/mmc/host/sdhci-
> esdhc.h index de132e2..8cd8449 100644
> --- a/drivers/mmc/host/sdhci-esdhc.h
> +++ b/drivers/mmc/host/sdhci-esdhc.h
> @@ -24,30 +24,31 @@
>  				SDHCI_QUIRK_PIO_NEEDS_DELAY | \
>  				SDHCI_QUIRK_NO_HISPD_BIT)
> 
> -#define ESDHC_PROCTL		0x28
> -
> -#define ESDHC_SYSTEM_CONTROL	0x2c
> -#define ESDHC_CLOCK_MASK	0x0000fff0
> -#define ESDHC_PREDIV_SHIFT	8
> -#define ESDHC_DIVIDER_SHIFT	4
> -#define ESDHC_CLOCK_PEREN	0x00000004
> -#define ESDHC_CLOCK_HCKEN	0x00000002
> -#define ESDHC_CLOCK_IPGEN	0x00000001
> -
>  /* pltfm-specific */
>  #define ESDHC_HOST_CONTROL_LE	0x20
> 
>  /*
> - * P2020 interpretation of the SDHCI_HOST_CONTROL register
> + * eSDHC register definition
>   */
> -#define ESDHC_CTRL_4BITBUS          (0x1 << 1)
> -#define ESDHC_CTRL_8BITBUS          (0x2 << 1)
> -#define ESDHC_CTRL_BUSWIDTH_MASK    (0x3 << 1)
> -
> -/* OF-specific */
> -#define ESDHC_DMA_SYSCTL	0x40c
> -#define ESDHC_DMA_SNOOP		0x00000040
> 
> -#define ESDHC_HOST_CONTROL_RES	0x01
> +/* Protocol Control Register */
> +#define ESDHC_PROCTL			0x28
> +#define ESDHC_CTRL_4BITBUS		(0x1 << 1)
> +#define ESDHC_CTRL_8BITBUS		(0x2 << 1)
> +#define ESDHC_CTRL_BUSWIDTH_MASK	(0x3 << 1)
> +#define ESDHC_HOST_CONTROL_RES		0x01
> +
> +/* System Control Register */
> +#define ESDHC_SYSTEM_CONTROL		0x2c
> +#define ESDHC_CLOCK_MASK		0x0000fff0
> +#define ESDHC_PREDIV_SHIFT		8
> +#define ESDHC_DIVIDER_SHIFT		4
> +#define ESDHC_CLOCK_PEREN		0x00000004
> +#define ESDHC_CLOCK_HCKEN		0x00000002
> +#define ESDHC_CLOCK_IPGEN		0x00000001
> +
> +/* Control Register for DMA transfer */
> +#define ESDHC_DMA_SYSCTL		0x40c
> +#define ESDHC_DMA_SNOOP			0x00000040
> 
>  #endif /* _DRIVERS_MMC_SDHCI_ESDHC_H */
> --
> 2.1.0.27.g96db324

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Yangbo Lu Dec. 9, 2016, 3:23 a.m. UTC | #2 
Hi Uffe,

Could you help to review and merge these two patches?
Thanks.


Best regards,
Yangbo Lu

> -----Original Message-----
> From: Y.B. Lu
> Sent: Friday, December 02, 2016 10:37 AM
> To: linux-mmc@vger.kernel.org; ulf.hansson@linaro.org
> Cc: X.B. Xie
> Subject: RE: [PATCH 1/2] mmc: sdhci-esdhc: clean up register definitions
> 
> Any comments on this patchset?
> Thanks.
> 
> 
> Best regards,
> Yangbo Lu
> 
> > -----Original Message-----
> > From: Yangbo Lu [mailto:yangbo.lu@nxp.com]
> > Sent: Friday, November 25, 2016 12:01 PM
> > To: linux-mmc@vger.kernel.org; ulf.hansson@linaro.org
> > Cc: Xiaobo Xie; Y.B. Lu
> > Subject: [PATCH 1/2] mmc: sdhci-esdhc: clean up register definitions
> >
> > The eSDHC register definitions in header file were messy and confusing.
> > This patch is to clean up these definitions.
> >
> > Signed-off-by: Yangbo Lu <yangbo.lu@nxp.com>
> > ---
> >  drivers/mmc/host/sdhci-esdhc.h | 39
> > ++++++++++++++++++++----------------
> > ---
> >  1 file changed, 20 insertions(+), 19 deletions(-)
> >
> > diff --git a/drivers/mmc/host/sdhci-esdhc.h b/drivers/mmc/host/sdhci-
> > esdhc.h index de132e2..8cd8449 100644
> > --- a/drivers/mmc/host/sdhci-esdhc.h
> > +++ b/drivers/mmc/host/sdhci-esdhc.h
> > @@ -24,30 +24,31 @@
> >  				SDHCI_QUIRK_PIO_NEEDS_DELAY | \
> >  				SDHCI_QUIRK_NO_HISPD_BIT)
> >
> > -#define ESDHC_PROCTL		0x28
> > -
> > -#define ESDHC_SYSTEM_CONTROL	0x2c
> > -#define ESDHC_CLOCK_MASK	0x0000fff0
> > -#define ESDHC_PREDIV_SHIFT	8
> > -#define ESDHC_DIVIDER_SHIFT	4
> > -#define ESDHC_CLOCK_PEREN	0x00000004
> > -#define ESDHC_CLOCK_HCKEN	0x00000002
> > -#define ESDHC_CLOCK_IPGEN	0x00000001
> > -
> >  /* pltfm-specific */
> >  #define ESDHC_HOST_CONTROL_LE	0x20
> >
> >  /*
> > - * P2020 interpretation of the SDHCI_HOST_CONTROL register
> > + * eSDHC register definition
> >   */
> > -#define ESDHC_CTRL_4BITBUS          (0x1 << 1)
> > -#define ESDHC_CTRL_8BITBUS          (0x2 << 1)
> > -#define ESDHC_CTRL_BUSWIDTH_MASK    (0x3 << 1)
> > -
> > -/* OF-specific */
> > -#define ESDHC_DMA_SYSCTL	0x40c
> > -#define ESDHC_DMA_SNOOP		0x00000040
> >
> > -#define ESDHC_HOST_CONTROL_RES	0x01
> > +/* Protocol Control Register */
> > +#define ESDHC_PROCTL			0x28
> > +#define ESDHC_CTRL_4BITBUS		(0x1 << 1)
> > +#define ESDHC_CTRL_8BITBUS		(0x2 << 1)
> > +#define ESDHC_CTRL_BUSWIDTH_MASK	(0x3 << 1)
> > +#define ESDHC_HOST_CONTROL_RES		0x01
> > +
> > +/* System Control Register */
> > +#define ESDHC_SYSTEM_CONTROL		0x2c
> > +#define ESDHC_CLOCK_MASK		0x0000fff0
> > +#define ESDHC_PREDIV_SHIFT		8
> > +#define ESDHC_DIVIDER_SHIFT		4
> > +#define ESDHC_CLOCK_PEREN		0x00000004
> > +#define ESDHC_CLOCK_HCKEN		0x00000002
> > +#define ESDHC_CLOCK_IPGEN		0x00000001
> > +
> > +/* Control Register for DMA transfer */
> > +#define ESDHC_DMA_SYSCTL		0x40c
> > +#define ESDHC_DMA_SNOOP			0x00000040
> >
> >  #endif /* _DRIVERS_MMC_SDHCI_ESDHC_H */
> > --
> > 2.1.0.27.g96db324

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Yangbo Lu Dec. 21, 2016, 10:06 a.m. UTC | #3 
Hi Uffe,

Did you have a chance to look at this?
Thanks a lot:)

Best regards,
Yangbo Lu

> -----Original Message-----
> From: Y.B. Lu
> Sent: Friday, December 09, 2016 11:24 AM
> To: 'linux-mmc@vger.kernel.org'; 'ulf.hansson@linaro.org'
> Cc: X.B. Xie
> Subject: RE: [PATCH 1/2] mmc: sdhci-esdhc: clean up register definitions
> 
> Hi Uffe,
> 
> Could you help to review and merge these two patches?
> Thanks.
> 
> 
> Best regards,
> Yangbo Lu
> 
> > -----Original Message-----
> > From: Y.B. Lu
> > Sent: Friday, December 02, 2016 10:37 AM
> > To: linux-mmc@vger.kernel.org; ulf.hansson@linaro.org
> > Cc: X.B. Xie
> > Subject: RE: [PATCH 1/2] mmc: sdhci-esdhc: clean up register
> > definitions
> >
> > Any comments on this patchset?
> > Thanks.
> >
> >
> > Best regards,
> > Yangbo Lu
> >
> > > -----Original Message-----
> > > From: Yangbo Lu [mailto:yangbo.lu@nxp.com]
> > > Sent: Friday, November 25, 2016 12:01 PM
> > > To: linux-mmc@vger.kernel.org; ulf.hansson@linaro.org
> > > Cc: Xiaobo Xie; Y.B. Lu
> > > Subject: [PATCH 1/2] mmc: sdhci-esdhc: clean up register definitions
> > >
> > > The eSDHC register definitions in header file were messy and
> confusing.
> > > This patch is to clean up these definitions.
> > >
> > > Signed-off-by: Yangbo Lu <yangbo.lu@nxp.com>
> > > ---
> > >  drivers/mmc/host/sdhci-esdhc.h | 39
> > > ++++++++++++++++++++----------------
> > > ---
> > >  1 file changed, 20 insertions(+), 19 deletions(-)
> > >
> > > diff --git a/drivers/mmc/host/sdhci-esdhc.h
> > > b/drivers/mmc/host/sdhci- esdhc.h index de132e2..8cd8449 100644
> > > --- a/drivers/mmc/host/sdhci-esdhc.h
> > > +++ b/drivers/mmc/host/sdhci-esdhc.h
> > > @@ -24,30 +24,31 @@
> > >  				SDHCI_QUIRK_PIO_NEEDS_DELAY | \
> > >  				SDHCI_QUIRK_NO_HISPD_BIT)
> > >
> > > -#define ESDHC_PROCTL		0x28
> > > -
> > > -#define ESDHC_SYSTEM_CONTROL	0x2c
> > > -#define ESDHC_CLOCK_MASK	0x0000fff0
> > > -#define ESDHC_PREDIV_SHIFT	8
> > > -#define ESDHC_DIVIDER_SHIFT	4
> > > -#define ESDHC_CLOCK_PEREN	0x00000004
> > > -#define ESDHC_CLOCK_HCKEN	0x00000002
> > > -#define ESDHC_CLOCK_IPGEN	0x00000001
> > > -
> > >  /* pltfm-specific */
> > >  #define ESDHC_HOST_CONTROL_LE	0x20
> > >
> > >  /*
> > > - * P2020 interpretation of the SDHCI_HOST_CONTROL register
> > > + * eSDHC register definition
> > >   */
> > > -#define ESDHC_CTRL_4BITBUS          (0x1 << 1)
> > > -#define ESDHC_CTRL_8BITBUS          (0x2 << 1)
> > > -#define ESDHC_CTRL_BUSWIDTH_MASK    (0x3 << 1)
> > > -
> > > -/* OF-specific */
> > > -#define ESDHC_DMA_SYSCTL	0x40c
> > > -#define ESDHC_DMA_SNOOP		0x00000040
> > >
> > > -#define ESDHC_HOST_CONTROL_RES	0x01
> > > +/* Protocol Control Register */
> > > +#define ESDHC_PROCTL			0x28
> > > +#define ESDHC_CTRL_4BITBUS		(0x1 << 1)
> > > +#define ESDHC_CTRL_8BITBUS		(0x2 << 1)
> > > +#define ESDHC_CTRL_BUSWIDTH_MASK	(0x3 << 1)
> > > +#define ESDHC_HOST_CONTROL_RES		0x01
> > > +
> > > +/* System Control Register */
> > > +#define ESDHC_SYSTEM_CONTROL		0x2c
> > > +#define ESDHC_CLOCK_MASK		0x0000fff0
> > > +#define ESDHC_PREDIV_SHIFT		8
> > > +#define ESDHC_DIVIDER_SHIFT		4
> > > +#define ESDHC_CLOCK_PEREN		0x00000004
> > > +#define ESDHC_CLOCK_HCKEN		0x00000002
> > > +#define ESDHC_CLOCK_IPGEN		0x00000001
> > > +
> > > +/* Control Register for DMA transfer */
> > > +#define ESDHC_DMA_SYSCTL		0x40c
> > > +#define ESDHC_DMA_SNOOP			0x00000040
> > >
> > >  #endif /* _DRIVERS_MMC_SDHCI_ESDHC_H */
> > > --
> > > 2.1.0.27.g96db324

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Ulf Hansson Dec. 21, 2016, 10:13 a.m. UTC | #4 
On 21 December 2016 at 11:06, Y.B. Lu <yangbo.lu@nxp.com> wrote:
> Hi Uffe,
>
> Did you have a chance to look at this?
> Thanks a lot:)

Please resend/rebase once rc1 is out, and make sure to have Adrian in
the to field. Then I will wait for his ack.

Kind regards
Uffe


>
> Best regards,
> Yangbo Lu
>
>> -----Original Message-----
>> From: Y.B. Lu
>> Sent: Friday, December 09, 2016 11:24 AM
>> To: 'linux-mmc@vger.kernel.org'; 'ulf.hansson@linaro.org'
>> Cc: X.B. Xie
>> Subject: RE: [PATCH 1/2] mmc: sdhci-esdhc: clean up register definitions
>>
>> Hi Uffe,
>>
>> Could you help to review and merge these two patches?
>> Thanks.
>>
>>
>> Best regards,
>> Yangbo Lu
>>
>> > -----Original Message-----
>> > From: Y.B. Lu
>> > Sent: Friday, December 02, 2016 10:37 AM
>> > To: linux-mmc@vger.kernel.org; ulf.hansson@linaro.org
>> > Cc: X.B. Xie
>> > Subject: RE: [PATCH 1/2] mmc: sdhci-esdhc: clean up register
>> > definitions
>> >
>> > Any comments on this patchset?
>> > Thanks.
>> >
>> >
>> > Best regards,
>> > Yangbo Lu
>> >
>> > > -----Original Message-----
>> > > From: Yangbo Lu [mailto:yangbo.lu@nxp.com]
>> > > Sent: Friday, November 25, 2016 12:01 PM
>> > > To: linux-mmc@vger.kernel.org; ulf.hansson@linaro.org
>> > > Cc: Xiaobo Xie; Y.B. Lu
>> > > Subject: [PATCH 1/2] mmc: sdhci-esdhc: clean up register definitions
>> > >
>> > > The eSDHC register definitions in header file were messy and
>> confusing.
>> > > This patch is to clean up these definitions.
>> > >
>> > > Signed-off-by: Yangbo Lu <yangbo.lu@nxp.com>
>> > > ---
>> > >  drivers/mmc/host/sdhci-esdhc.h | 39
>> > > ++++++++++++++++++++----------------
>> > > ---
>> > >  1 file changed, 20 insertions(+), 19 deletions(-)
>> > >
>> > > diff --git a/drivers/mmc/host/sdhci-esdhc.h
>> > > b/drivers/mmc/host/sdhci- esdhc.h index de132e2..8cd8449 100644
>> > > --- a/drivers/mmc/host/sdhci-esdhc.h
>> > > +++ b/drivers/mmc/host/sdhci-esdhc.h
>> > > @@ -24,30 +24,31 @@
>> > >                           SDHCI_QUIRK_PIO_NEEDS_DELAY | \
>> > >                           SDHCI_QUIRK_NO_HISPD_BIT)
>> > >
>> > > -#define ESDHC_PROCTL             0x28
>> > > -
>> > > -#define ESDHC_SYSTEM_CONTROL     0x2c
>> > > -#define ESDHC_CLOCK_MASK 0x0000fff0
>> > > -#define ESDHC_PREDIV_SHIFT       8
>> > > -#define ESDHC_DIVIDER_SHIFT      4
>> > > -#define ESDHC_CLOCK_PEREN        0x00000004
>> > > -#define ESDHC_CLOCK_HCKEN        0x00000002
>> > > -#define ESDHC_CLOCK_IPGEN        0x00000001
>> > > -
>> > >  /* pltfm-specific */
>> > >  #define ESDHC_HOST_CONTROL_LE    0x20
>> > >
>> > >  /*
>> > > - * P2020 interpretation of the SDHCI_HOST_CONTROL register
>> > > + * eSDHC register definition
>> > >   */
>> > > -#define ESDHC_CTRL_4BITBUS          (0x1 << 1)
>> > > -#define ESDHC_CTRL_8BITBUS          (0x2 << 1)
>> > > -#define ESDHC_CTRL_BUSWIDTH_MASK    (0x3 << 1)
>> > > -
>> > > -/* OF-specific */
>> > > -#define ESDHC_DMA_SYSCTL 0x40c
>> > > -#define ESDHC_DMA_SNOOP          0x00000040
>> > >
>> > > -#define ESDHC_HOST_CONTROL_RES   0x01
>> > > +/* Protocol Control Register */
>> > > +#define ESDHC_PROCTL                     0x28
>> > > +#define ESDHC_CTRL_4BITBUS               (0x1 << 1)
>> > > +#define ESDHC_CTRL_8BITBUS               (0x2 << 1)
>> > > +#define ESDHC_CTRL_BUSWIDTH_MASK (0x3 << 1)
>> > > +#define ESDHC_HOST_CONTROL_RES           0x01
>> > > +
>> > > +/* System Control Register */
>> > > +#define ESDHC_SYSTEM_CONTROL             0x2c
>> > > +#define ESDHC_CLOCK_MASK         0x0000fff0
>> > > +#define ESDHC_PREDIV_SHIFT               8
>> > > +#define ESDHC_DIVIDER_SHIFT              4
>> > > +#define ESDHC_CLOCK_PEREN                0x00000004
>> > > +#define ESDHC_CLOCK_HCKEN                0x00000002
>> > > +#define ESDHC_CLOCK_IPGEN                0x00000001
>> > > +
>> > > +/* Control Register for DMA transfer */
>> > > +#define ESDHC_DMA_SYSCTL         0x40c
>> > > +#define ESDHC_DMA_SNOOP                  0x00000040
>> > >
>> > >  #endif /* _DRIVERS_MMC_SDHCI_ESDHC_H */
>> > > --
>> > > 2.1.0.27.g96db324
>
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Yangbo Lu Dec. 26, 2016, 10:01 a.m. UTC | #5 
> -----Original Message-----

> From: Ulf Hansson [mailto:ulf.hansson@linaro.org]

> Sent: Wednesday, December 21, 2016 6:14 PM

> To: Y.B. Lu

> Cc: linux-mmc@vger.kernel.org; Xiaobo Xie

> Subject: Re: [PATCH 1/2] mmc: sdhci-esdhc: clean up register definitions

> 

> On 21 December 2016 at 11:06, Y.B. Lu <yangbo.lu@nxp.com> wrote:

> > Hi Uffe,

> >

> > Did you have a chance to look at this?

> > Thanks a lot:)

> 

> Please resend/rebase once rc1 is out, and make sure to have Adrian in the

> to field. Then I will wait for his ack.

> 


[Lu Yangbo-B47093] Thanks for your reminding, Uffe. Sent out the patches with Adrian in To list.

> Kind regards

> Uffe

> 

> 

> >

> > Best regards,

> > Yangbo Lu

> >

> >> -----Original Message-----

> >> From: Y.B. Lu

> >> Sent: Friday, December 09, 2016 11:24 AM

> >> To: 'linux-mmc@vger.kernel.org'; 'ulf.hansson@linaro.org'

> >> Cc: X.B. Xie

> >> Subject: RE: [PATCH 1/2] mmc: sdhci-esdhc: clean up register

> >> definitions

> >>

> >> Hi Uffe,

> >>

> >> Could you help to review and merge these two patches?

> >> Thanks.

> >>

> >>

> >> Best regards,

> >> Yangbo Lu

> >>

> >> > -----Original Message-----

> >> > From: Y.B. Lu

> >> > Sent: Friday, December 02, 2016 10:37 AM

> >> > To: linux-mmc@vger.kernel.org; ulf.hansson@linaro.org

> >> > Cc: X.B. Xie

> >> > Subject: RE: [PATCH 1/2] mmc: sdhci-esdhc: clean up register

> >> > definitions

> >> >

> >> > Any comments on this patchset?

> >> > Thanks.

> >> >

> >> >

> >> > Best regards,

> >> > Yangbo Lu

> >> >

> >> > > -----Original Message-----

> >> > > From: Yangbo Lu [mailto:yangbo.lu@nxp.com]

> >> > > Sent: Friday, November 25, 2016 12:01 PM

> >> > > To: linux-mmc@vger.kernel.org; ulf.hansson@linaro.org

> >> > > Cc: Xiaobo Xie; Y.B. Lu

> >> > > Subject: [PATCH 1/2] mmc: sdhci-esdhc: clean up register

> >> > > definitions

> >> > >

> >> > > The eSDHC register definitions in header file were messy and

> >> confusing.

> >> > > This patch is to clean up these definitions.

> >> > >

> >> > > Signed-off-by: Yangbo Lu <yangbo.lu@nxp.com>

> >> > > ---

> >> > >  drivers/mmc/host/sdhci-esdhc.h | 39

> >> > > ++++++++++++++++++++----------------

> >> > > ---

> >> > >  1 file changed, 20 insertions(+), 19 deletions(-)

> >> > >

> >> > > diff --git a/drivers/mmc/host/sdhci-esdhc.h

> >> > > b/drivers/mmc/host/sdhci- esdhc.h index de132e2..8cd8449 100644

> >> > > --- a/drivers/mmc/host/sdhci-esdhc.h

> >> > > +++ b/drivers/mmc/host/sdhci-esdhc.h

> >> > > @@ -24,30 +24,31 @@

> >> > >                           SDHCI_QUIRK_PIO_NEEDS_DELAY | \

> >> > >                           SDHCI_QUIRK_NO_HISPD_BIT)

> >> > >

> >> > > -#define ESDHC_PROCTL             0x28

> >> > > -

> >> > > -#define ESDHC_SYSTEM_CONTROL     0x2c

> >> > > -#define ESDHC_CLOCK_MASK 0x0000fff0

> >> > > -#define ESDHC_PREDIV_SHIFT       8

> >> > > -#define ESDHC_DIVIDER_SHIFT      4

> >> > > -#define ESDHC_CLOCK_PEREN        0x00000004

> >> > > -#define ESDHC_CLOCK_HCKEN        0x00000002

> >> > > -#define ESDHC_CLOCK_IPGEN        0x00000001

> >> > > -

> >> > >  /* pltfm-specific */

> >> > >  #define ESDHC_HOST_CONTROL_LE    0x20

> >> > >

> >> > >  /*

> >> > > - * P2020 interpretation of the SDHCI_HOST_CONTROL register

> >> > > + * eSDHC register definition

> >> > >   */

> >> > > -#define ESDHC_CTRL_4BITBUS          (0x1 << 1)

> >> > > -#define ESDHC_CTRL_8BITBUS          (0x2 << 1)

> >> > > -#define ESDHC_CTRL_BUSWIDTH_MASK    (0x3 << 1)

> >> > > -

> >> > > -/* OF-specific */

> >> > > -#define ESDHC_DMA_SYSCTL 0x40c

> >> > > -#define ESDHC_DMA_SNOOP          0x00000040

> >> > >

> >> > > -#define ESDHC_HOST_CONTROL_RES   0x01

> >> > > +/* Protocol Control Register */

> >> > > +#define ESDHC_PROCTL                     0x28

> >> > > +#define ESDHC_CTRL_4BITBUS               (0x1 << 1)

> >> > > +#define ESDHC_CTRL_8BITBUS               (0x2 << 1)

> >> > > +#define ESDHC_CTRL_BUSWIDTH_MASK (0x3 << 1)

> >> > > +#define ESDHC_HOST_CONTROL_RES           0x01

> >> > > +

> >> > > +/* System Control Register */

> >> > > +#define ESDHC_SYSTEM_CONTROL             0x2c

> >> > > +#define ESDHC_CLOCK_MASK         0x0000fff0

> >> > > +#define ESDHC_PREDIV_SHIFT               8

> >> > > +#define ESDHC_DIVIDER_SHIFT              4

> >> > > +#define ESDHC_CLOCK_PEREN                0x00000004

> >> > > +#define ESDHC_CLOCK_HCKEN                0x00000002

> >> > > +#define ESDHC_CLOCK_IPGEN                0x00000001

> >> > > +

> >> > > +/* Control Register for DMA transfer */

> >> > > +#define ESDHC_DMA_SYSCTL         0x40c

> >> > > +#define ESDHC_DMA_SNOOP                  0x00000040

> >> > >

> >> > >  #endif /* _DRIVERS_MMC_SDHCI_ESDHC_H */

> >> > > --

> >> > > 2.1.0.27.g96db324

> >
diff mbox

Patch

diff --git a/drivers/mmc/host/sdhci-esdhc.h b/drivers/mmc/host/sdhci-esdhc.h
index de132e2..8cd8449 100644
--- a/drivers/mmc/host/sdhci-esdhc.h
+++ b/drivers/mmc/host/sdhci-esdhc.h
@@ -24,30 +24,31 @@ 
 				SDHCI_QUIRK_PIO_NEEDS_DELAY | \
 				SDHCI_QUIRK_NO_HISPD_BIT)
 
-#define ESDHC_PROCTL		0x28
-
-#define ESDHC_SYSTEM_CONTROL	0x2c
-#define ESDHC_CLOCK_MASK	0x0000fff0
-#define ESDHC_PREDIV_SHIFT	8
-#define ESDHC_DIVIDER_SHIFT	4
-#define ESDHC_CLOCK_PEREN	0x00000004
-#define ESDHC_CLOCK_HCKEN	0x00000002
-#define ESDHC_CLOCK_IPGEN	0x00000001
-
 /* pltfm-specific */
 #define ESDHC_HOST_CONTROL_LE	0x20
 
 /*
- * P2020 interpretation of the SDHCI_HOST_CONTROL register
+ * eSDHC register definition
  */
-#define ESDHC_CTRL_4BITBUS          (0x1 << 1)
-#define ESDHC_CTRL_8BITBUS          (0x2 << 1)
-#define ESDHC_CTRL_BUSWIDTH_MASK    (0x3 << 1)
-
-/* OF-specific */
-#define ESDHC_DMA_SYSCTL	0x40c
-#define ESDHC_DMA_SNOOP		0x00000040
 
-#define ESDHC_HOST_CONTROL_RES	0x01
+/* Protocol Control Register */
+#define ESDHC_PROCTL			0x28
+#define ESDHC_CTRL_4BITBUS		(0x1 << 1)
+#define ESDHC_CTRL_8BITBUS		(0x2 << 1)
+#define ESDHC_CTRL_BUSWIDTH_MASK	(0x3 << 1)
+#define ESDHC_HOST_CONTROL_RES		0x01
+
+/* System Control Register */
+#define ESDHC_SYSTEM_CONTROL		0x2c
+#define ESDHC_CLOCK_MASK		0x0000fff0
+#define ESDHC_PREDIV_SHIFT		8
+#define ESDHC_DIVIDER_SHIFT		4
+#define ESDHC_CLOCK_PEREN		0x00000004
+#define ESDHC_CLOCK_HCKEN		0x00000002
+#define ESDHC_CLOCK_IPGEN		0x00000001
+
+/* Control Register for DMA transfer */
+#define ESDHC_DMA_SYSCTL		0x40c
+#define ESDHC_DMA_SNOOP			0x00000040
 
 #endif /* _DRIVERS_MMC_SDHCI_ESDHC_H */