From patchwork Thu Mar 16 10:32:43 2017 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Jon Hunter X-Patchwork-Id: 9627817 Return-Path: Received: from mail.wl.linuxfoundation.org (pdx-wl-mail.web.codeaurora.org [172.30.200.125]) by pdx-korg-patchwork.web.codeaurora.org (Postfix) with ESMTP id DA8716048C for ; Thu, 16 Mar 2017 10:38:09 +0000 (UTC) Received: from mail.wl.linuxfoundation.org (localhost [127.0.0.1]) by mail.wl.linuxfoundation.org (Postfix) with ESMTP id CBF8828675 for ; Thu, 16 Mar 2017 10:38:09 +0000 (UTC) Received: by mail.wl.linuxfoundation.org (Postfix, from userid 486) id C05E728688; Thu, 16 Mar 2017 10:38:09 +0000 (UTC) X-Spam-Checker-Version: SpamAssassin 3.3.1 (2010-03-16) on pdx-wl-mail.web.codeaurora.org X-Spam-Level: X-Spam-Status: No, score=-6.9 required=2.0 tests=BAYES_00,RCVD_IN_DNSWL_HI autolearn=unavailable version=3.3.1 Received: from vger.kernel.org (vger.kernel.org [209.132.180.67]) by mail.wl.linuxfoundation.org (Postfix) with ESMTP id 4A23C28675 for ; Thu, 16 Mar 2017 10:38:09 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1751475AbdCPKhs (ORCPT ); Thu, 16 Mar 2017 06:37:48 -0400 Received: from hqemgate15.nvidia.com ([216.228.121.64]:18008 "EHLO hqemgate15.nvidia.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1751182AbdCPKhp (ORCPT ); Thu, 16 Mar 2017 06:37:45 -0400 Received: from hqpgpgate101.nvidia.com (Not Verified[216.228.121.13]) by hqemgate15.nvidia.com id ; Thu, 16 Mar 2017 03:42:03 -0700 Received: from HQMAIL103.nvidia.com ([172.20.13.39]) by hqpgpgate101.nvidia.com (PGP Universal service); Thu, 16 Mar 2017 03:37:19 -0700 X-PGP-Universal: processed; by hqpgpgate101.nvidia.com on Thu, 16 Mar 2017 03:37:19 -0700 Received: from HQMAIL102.nvidia.com (172.18.146.10) by HQMAIL103.nvidia.com (172.20.187.11) with Microsoft SMTP Server (TLS) id 15.0.1263.5; Thu, 16 Mar 2017 10:32:50 +0000 Received: from hqnvemgw02.nvidia.com (172.16.227.111) by HQMAIL102.nvidia.com (172.18.146.10) with Microsoft SMTP Server id 15.0.1263.5 via Frontend Transport; Thu, 16 Mar 2017 10:32:50 +0000 Received: from goldfinger.nvidia.com (Not Verified[10.21.132.151]) by hqnvemgw02.nvidia.com with Trustwave SEG (v7, 5, 5, 8150) id ; Thu, 16 Mar 2017 03:32:50 -0700 From: Jon Hunter To: Adrian Hunter , Ulf Hansson , Thierry Reding , Ritesh Harjani CC: , , , Jon Hunter Subject: [PATCH 1/2] mmc: sdhci: Add support for setting parent clock Date: Thu, 16 Mar 2017 10:32:43 +0000 Message-ID: <1489660364-17698-1-git-send-email-jonathanh@nvidia.com> X-Mailer: git-send-email 2.7.4 X-NVConfidentiality: public MIME-Version: 1.0 Sender: linux-mmc-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-mmc@vger.kernel.org X-Virus-Scanned: ClamAV using ClamSMTP It is common for SD/MMC host controllers to set the parent clock that drives the SD/MMC interface in order to support various operating speeds. Typically, this is performed by calling common clock framework APIs such as clk_set_rate(). The problem is that these APIs may sleep and must not be called from within atomic sections and therefore, these functions cannot be called within the existing 'set_clock' SDHCI operator because they are called from within the context of a spinlock. Add a new 'set_parent_clock' operator for the SDHCI driver that is called early during the SDHCI 'set_ios' before the spinlock is aquire to give the platform driver the opportunity to set the parent clock rate. Please note that, unfortunately, the Tegra and MSM SDHCI drivers currently appear to mis-use the 'set_clock' operator by calling clk_set_rate(). In the case of Tegra, occasionally but not always, 'scheduling while atomic' errors are reported (so most of the time we are getting lucky). In the of the MSM SDHCI driver, it is releasing and re-acquiring the spinlock which is bad. Signed-off-by: Jon Hunter --- I have not attempted to fix the MSM driver in this seris, but I am copying hopefully, the right people to fix it. drivers/mmc/host/sdhci.c | 3 +++ drivers/mmc/host/sdhci.h | 2 ++ 2 files changed, 5 insertions(+) diff --git a/drivers/mmc/host/sdhci.c b/drivers/mmc/host/sdhci.c index 6fdd7a70f229..b7f1521edbec 100644 --- a/drivers/mmc/host/sdhci.c +++ b/drivers/mmc/host/sdhci.c @@ -1579,6 +1579,9 @@ static void sdhci_set_ios(struct mmc_host *mmc, struct mmc_ios *ios) if (ios->power_mode == MMC_POWER_UNDEFINED) return; + if (host->ops->set_parent_clock) + host->ops->set_parent_clock(host, ios->power_mode); + spin_lock_irqsave(&host->lock, flags); if (host->flags & SDHCI_DEVICE_DEAD) { diff --git a/drivers/mmc/host/sdhci.h b/drivers/mmc/host/sdhci.h index edf3adfbc213..585fbcdab70c 100644 --- a/drivers/mmc/host/sdhci.h +++ b/drivers/mmc/host/sdhci.h @@ -541,6 +541,8 @@ struct sdhci_ops { #endif void (*set_clock)(struct sdhci_host *host, unsigned int clock); + void (*set_parent_clock)(struct sdhci_host *host, + unsigned int clock); void (*set_power)(struct sdhci_host *host, unsigned char mode, unsigned short vdd);