From patchwork Fri Mar 17 09:25:31 2017 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Jon Hunter X-Patchwork-Id: 9630079 Return-Path: Received: from mail.wl.linuxfoundation.org (pdx-wl-mail.web.codeaurora.org [172.30.200.125]) by pdx-korg-patchwork.web.codeaurora.org (Postfix) with ESMTP id 6334160132 for ; Fri, 17 Mar 2017 09:32:50 +0000 (UTC) Received: from mail.wl.linuxfoundation.org (localhost [127.0.0.1]) by mail.wl.linuxfoundation.org (Postfix) with ESMTP id 714C328512 for ; Fri, 17 Mar 2017 09:32:50 +0000 (UTC) Received: by mail.wl.linuxfoundation.org (Postfix, from userid 486) id 6439228697; Fri, 17 Mar 2017 09:32:50 +0000 (UTC) X-Spam-Checker-Version: SpamAssassin 3.3.1 (2010-03-16) on pdx-wl-mail.web.codeaurora.org X-Spam-Level: X-Spam-Status: No, score=-6.9 required=2.0 tests=BAYES_00,RCVD_IN_DNSWL_HI autolearn=ham version=3.3.1 Received: from vger.kernel.org (vger.kernel.org [209.132.180.67]) by mail.wl.linuxfoundation.org (Postfix) with ESMTP id BD58528512 for ; Fri, 17 Mar 2017 09:32:49 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1750898AbdCQJcs (ORCPT ); Fri, 17 Mar 2017 05:32:48 -0400 Received: from hqemgate15.nvidia.com ([216.228.121.64]:12215 "EHLO hqemgate15.nvidia.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1750885AbdCQJcs (ORCPT ); Fri, 17 Mar 2017 05:32:48 -0400 Received: from hqpgpgate101.nvidia.com (Not Verified[216.228.121.13]) by hqemgate15.nvidia.com id ; Fri, 17 Mar 2017 02:32:30 -0700 Received: from HQMAIL101.nvidia.com ([172.20.13.39]) by hqpgpgate101.nvidia.com (PGP Universal service); Fri, 17 Mar 2017 02:26:44 -0700 X-PGP-Universal: processed; by hqpgpgate101.nvidia.com on Fri, 17 Mar 2017 02:26:44 -0700 Received: from HQMAIL105.nvidia.com (172.20.187.12) by HQMAIL101.nvidia.com (172.20.187.10) with Microsoft SMTP Server (TLS) id 15.0.1263.5; Fri, 17 Mar 2017 09:25:53 +0000 Received: from hqnvemgw02.nvidia.com (172.16.227.111) by HQMAIL105.nvidia.com (172.20.187.12) with Microsoft SMTP Server id 15.0.1263.5 via Frontend Transport; Fri, 17 Mar 2017 09:25:53 +0000 Received: from goldfinger.nvidia.com (Not Verified[10.21.132.151]) by hqnvemgw02.nvidia.com with Trustwave SEG (v7, 5, 5, 8150) id ; Fri, 17 Mar 2017 02:25:52 -0700 From: Jon Hunter To: Adrian Hunter , Ulf Hansson , Thierry Reding , Ritesh Harjani CC: , , , Jon Hunter Subject: [PATCH V2 1/2] mmc: sdhci: Add support for setting parent clock Date: Fri, 17 Mar 2017 09:25:31 +0000 Message-ID: <1489742732-7722-1-git-send-email-jonathanh@nvidia.com> X-Mailer: git-send-email 2.7.4 X-NVConfidentiality: public MIME-Version: 1.0 Sender: linux-mmc-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-mmc@vger.kernel.org X-Virus-Scanned: ClamAV using ClamSMTP It is common for SD/MMC host controllers to set the parent clock that drives the SD/MMC interface in order to support various operating speeds. Typically, this is performed by calling common clock framework APIs such as clk_set_rate(). The problem is that these APIs may sleep and must not be called from within atomic sections and therefore, these functions cannot be called within the existing 'set_clock' SDHCI operator because they are called from within the context of a spinlock. Add a new 'set_parent_clock' operator for the SDHCI driver that is called early during the SDHCI 'set_ios' before the spinlock is aquired to give the platform driver the opportunity to set the parent clock rate. Please note that the Tegra and MSM SDHCI drivers currently appear to mis-use the 'set_clock' operator by calling clk_set_rate(). In the case of Tegra, occasionally but not always, 'scheduling while atomic' errors are reported (so most of the time we are getting lucky). In the of the MSM SDHCI driver, it is releasing and re-acquiring the spinlock which is bad. Signed-off-by: Jon Hunter Reviewed-by: Thierry Reding --- Changes since V1: - Fixed idiotic copy-paste error and testing thoroughly! drivers/mmc/host/sdhci.c | 3 +++ drivers/mmc/host/sdhci.h | 2 ++ 2 files changed, 5 insertions(+) diff --git a/drivers/mmc/host/sdhci.c b/drivers/mmc/host/sdhci.c index 6fdd7a70f229..8effc28ece15 100644 --- a/drivers/mmc/host/sdhci.c +++ b/drivers/mmc/host/sdhci.c @@ -1579,6 +1579,9 @@ static void sdhci_set_ios(struct mmc_host *mmc, struct mmc_ios *ios) if (ios->power_mode == MMC_POWER_UNDEFINED) return; + if (host->ops->set_parent_clock) + host->ops->set_parent_clock(host, ios->clock); + spin_lock_irqsave(&host->lock, flags); if (host->flags & SDHCI_DEVICE_DEAD) { diff --git a/drivers/mmc/host/sdhci.h b/drivers/mmc/host/sdhci.h index edf3adfbc213..585fbcdab70c 100644 --- a/drivers/mmc/host/sdhci.h +++ b/drivers/mmc/host/sdhci.h @@ -541,6 +541,8 @@ struct sdhci_ops { #endif void (*set_clock)(struct sdhci_host *host, unsigned int clock); + void (*set_parent_clock)(struct sdhci_host *host, + unsigned int clock); void (*set_power)(struct sdhci_host *host, unsigned char mode, unsigned short vdd);