| Message ID | 1497510980-23207-2-git-send-email-frank.wang@rock-chips.com (mailing list archive) |
|---|---|
| State | New, archived |
| Headers | show |
Am Donnerstag, 15. Juni 2017, 15:16:15 CEST schrieb Frank Wang: > Due to some tiny differences between RK3228 and RK3229, this patch > adds a basic dtsi file which includes a new CPU opp table and PSCI > brought up support for RK3229. > > Signed-off-by: Frank Wang <frank.wang@rock-chips.com> > --- > arch/arm/boot/dts/rk3229-evb.dts | 2 +- > arch/arm/boot/dts/rk3229.dtsi | 110 +++++++++++++++++++++++++++++++++++++++ > 2 files changed, 111 insertions(+), 1 deletion(-) > create mode 100644 arch/arm/boot/dts/rk3229.dtsi > > diff --git a/arch/arm/boot/dts/rk3229-evb.dts b/arch/arm/boot/dts/rk3229-evb.dts > index 1b55192..82e8a53 100644 > --- a/arch/arm/boot/dts/rk3229-evb.dts > +++ b/arch/arm/boot/dts/rk3229-evb.dts > @@ -40,7 +40,7 @@ > > /dts-v1/; > > -#include "rk322x.dtsi" > +#include "rk3229.dtsi" > > / { > model = "Rockchip RK3229 Evaluation board"; > diff --git a/arch/arm/boot/dts/rk3229.dtsi b/arch/arm/boot/dts/rk3229.dtsi > new file mode 100644 > index 0000000..d43d133 > --- /dev/null > +++ b/arch/arm/boot/dts/rk3229.dtsi > @@ -0,0 +1,110 @@ > +/* > + * Copyright (c) 2017 Fuzhou Rockchip Electronics Co., Ltd > + * > + * This file is dual-licensed: you can use it either under the terms > + * of the GPL or the X11 license, at your option. Note that this dual > + * licensing only applies to this file, and not this project as a > + * whole. > + * > + * a) This library is free software; you can redistribute it and/or > + * modify it under the terms of the GNU General Public License as > + * published by the Free Software Foundation; either version 2 of the > + * License, or (at your option) any later version. > + * > + * This library is distributed in the hope that it will be useful, > + * but WITHOUT ANY WARRANTY; without even the implied warranty of > + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the > + * GNU General Public License for more details. > + * > + * Or, alternatively, > + * > + * b) Permission is hereby granted, free of charge, to any person > + * obtaining a copy of this software and associated documentation > + * files (the "Software"), to deal in the Software without > + * restriction, including without limitation the rights to use, > + * copy, modify, merge, publish, distribute, sublicense, and/or > + * sell copies of the Software, and to permit persons to whom the > + * Software is furnished to do so, subject to the following > + * conditions: > + * > + * The above copyright notice and this permission notice shall be > + * included in all copies or substantial portions of the Software. > + * > + * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, > + * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES > + * OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND > + * NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT > + * HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, > + * WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING > + * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR > + * OTHER DEALINGS IN THE SOFTWARE. > + */ > + > +#include "rk322x.dtsi" > + > +/ { > + compatible = "rockchip,rk3229"; > + > + /delete-node/ opp-table0; > + > + cpu0_opp_table: opp_table0 { > + compatible = "operating-points-v2"; > + opp-shared; > + > + opp-408000000 { > + opp-hz = /bits/ 64 <408000000>; > + opp-microvolt = <950000>; > + clock-latency-ns = <40000>; > + opp-suspend; > + }; > + opp-600000000 { > + opp-hz = /bits/ 64 <600000000>; > + opp-microvolt = <975000>; > + }; > + opp-816000000 { > + opp-hz = /bits/ 64 <816000000>; > + opp-microvolt = <1000000>; > + }; > + opp-1008000000 { > + opp-hz = /bits/ 64 <1008000000>; > + opp-microvolt = <1175000>; > + }; > + opp-1200000000 { > + opp-hz = /bits/ 64 <1200000000>; > + opp-microvolt = <1275000>; > + }; > + opp-1296000000 { > + opp-hz = /bits/ 64 <1296000000>; > + opp-microvolt = <1325000>; > + }; > + opp-1392000000 { > + opp-hz = /bits/ 64 <1392000000>; > + opp-microvolt = <1375000>; > + }; > + opp-1464000000 { > + opp-hz = /bits/ 64 <1464000000>; > + opp-microvolt = <1400000>; > + }; > + }; > + > + psci { > + compatible = "arm,psci-1.0", "arm,psci-0.2"; > + method = "smc"; > + }; > +}; > + > +&cpu0 { > + enable-method = "psci"; > +}; Hmm, I don't really understand this. What method of core-bringup does the rk3228 use? In the current rk322x.dtsi there is no enable-method at all defined. So is the rk3228 firmware using a different method than the rk3229? And out of curiosity as this is a arm32 without atf, is the psci implementation (for uboot?) you're using available somewhere? Thanks Heiko > + > +&cpu1 { > + enable-method = "psci"; > +}; > + > +&cpu2 { > + enable-method = "psci"; > +}; > + > +&cpu3 { > + enable-method = "psci"; > +}; > -- To unsubscribe from this list: send the line "unsubscribe linux-mmc" in the body of a message to majordomo@vger.kernel.org More majordomo info at http://vger.kernel.org/majordomo-info.html
Hi Heiko, On 2017/6/18 2:12, Heiko Stuebner wrote: > Am Donnerstag, 15. Juni 2017, 15:16:15 CEST schrieb Frank Wang: >> Due to some tiny differences between RK3228 and RK3229, this patch >> adds a basic dtsi file which includes a new CPU opp table and PSCI >> brought up support for RK3229. >> >> Signed-off-by: Frank Wang <frank.wang@rock-chips.com> >> --- >> arch/arm/boot/dts/rk3229-evb.dts | 2 +- >> arch/arm/boot/dts/rk3229.dtsi | 110 +++++++++++++++++++++++++++++++++++++++ >> 2 files changed, 111 insertions(+), 1 deletion(-) >> create mode 100644 arch/arm/boot/dts/rk3229.dtsi >> >> diff --git a/arch/arm/boot/dts/rk3229-evb.dts b/arch/arm/boot/dts/rk3229-evb.dts >> index 1b55192..82e8a53 100644 >> --- a/arch/arm/boot/dts/rk3229-evb.dts >> +++ b/arch/arm/boot/dts/rk3229-evb.dts >> @@ -40,7 +40,7 @@ >> >> /dts-v1/; >> >> -#include "rk322x.dtsi" >> +#include "rk3229.dtsi" >> >> / { >> model = "Rockchip RK3229 Evaluation board"; >> diff --git a/arch/arm/boot/dts/rk3229.dtsi b/arch/arm/boot/dts/rk3229.dtsi >> new file mode 100644 >> index 0000000..d43d133 >> --- /dev/null >> +++ b/arch/arm/boot/dts/rk3229.dtsi >> @@ -0,0 +1,110 @@ >> +/* >> + * Copyright (c) 2017 Fuzhou Rockchip Electronics Co., Ltd >> + * >> + * This file is dual-licensed: you can use it either under the terms >> + * of the GPL or the X11 license, at your option. Note that this dual >> + * licensing only applies to this file, and not this project as a >> + * whole. >> + * >> + * a) This library is free software; you can redistribute it and/or >> + * modify it under the terms of the GNU General Public License as >> + * published by the Free Software Foundation; either version 2 of the >> + * License, or (at your option) any later version. >> + * >> + * This library is distributed in the hope that it will be useful, >> + * but WITHOUT ANY WARRANTY; without even the implied warranty of >> + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the >> + * GNU General Public License for more details. >> + * >> + * Or, alternatively, >> + * >> + * b) Permission is hereby granted, free of charge, to any person >> + * obtaining a copy of this software and associated documentation >> + * files (the "Software"), to deal in the Software without >> + * restriction, including without limitation the rights to use, >> + * copy, modify, merge, publish, distribute, sublicense, and/or >> + * sell copies of the Software, and to permit persons to whom the >> + * Software is furnished to do so, subject to the following >> + * conditions: >> + * >> + * The above copyright notice and this permission notice shall be >> + * included in all copies or substantial portions of the Software. >> + * >> + * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, >> + * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES >> + * OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND >> + * NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT >> + * HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, >> + * WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING >> + * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR >> + * OTHER DEALINGS IN THE SOFTWARE. >> + */ >> + >> +#include "rk322x.dtsi" >> + >> +/ { >> + compatible = "rockchip,rk3229"; >> + >> + /delete-node/ opp-table0; >> + >> + cpu0_opp_table: opp_table0 { >> + compatible = "operating-points-v2"; >> + opp-shared; >> + >> + opp-408000000 { >> + opp-hz = /bits/ 64 <408000000>; >> + opp-microvolt = <950000>; >> + clock-latency-ns = <40000>; >> + opp-suspend; >> + }; >> + opp-600000000 { >> + opp-hz = /bits/ 64 <600000000>; >> + opp-microvolt = <975000>; >> + }; >> + opp-816000000 { >> + opp-hz = /bits/ 64 <816000000>; >> + opp-microvolt = <1000000>; >> + }; >> + opp-1008000000 { >> + opp-hz = /bits/ 64 <1008000000>; >> + opp-microvolt = <1175000>; >> + }; >> + opp-1200000000 { >> + opp-hz = /bits/ 64 <1200000000>; >> + opp-microvolt = <1275000>; >> + }; >> + opp-1296000000 { >> + opp-hz = /bits/ 64 <1296000000>; >> + opp-microvolt = <1325000>; >> + }; >> + opp-1392000000 { >> + opp-hz = /bits/ 64 <1392000000>; >> + opp-microvolt = <1375000>; >> + }; >> + opp-1464000000 { >> + opp-hz = /bits/ 64 <1464000000>; >> + opp-microvolt = <1400000>; >> + }; >> + }; >> + >> + psci { >> + compatible = "arm,psci-1.0", "arm,psci-0.2"; >> + method = "smc"; >> + }; >> +}; >> + >> +&cpu0 { >> + enable-method = "psci"; >> +}; > Hmm, I don't really understand this. > What method of core-bringup does the rk3228 use? In the current > rk322x.dtsi there is no enable-method at all defined. For non-security, the same with rk3036 SoC, we use rk3036-smp method to bring-up cores, and for security, we use arm-psci method. As security become more and more important and required, we would prefer using arm-psci method, and it is also an easy way to use. > So is the rk3228 firmware using a different method than the rk3229? No, they are the same. How about I move these changes to rk322x.dtsi? > And out of curiosity as this is a arm32 without atf, is the psci > implementation (for uboot?) you're using available somewhere? Ah, it is included in op-tee :-) BR. Frank > > Thanks > Heiko > >> + >> +&cpu1 { >> + enable-method = "psci"; >> +}; >> + >> +&cpu2 { >> + enable-method = "psci"; >> +}; >> + >> +&cpu3 { >> + enable-method = "psci"; >> +}; >> > -- To unsubscribe from this list: send the line "unsubscribe linux-mmc" in the body of a message to majordomo@vger.kernel.org More majordomo info at http://vger.kernel.org/majordomo-info.html
Hi Frank, Am Montag, 19. Juni 2017, 18:34:27 CEST schrieb Frank Wang: > On 2017/6/18 2:12, Heiko Stuebner wrote: > > Am Donnerstag, 15. Juni 2017, 15:16:15 CEST schrieb Frank Wang: > >> Due to some tiny differences between RK3228 and RK3229, this patch > >> adds a basic dtsi file which includes a new CPU opp table and PSCI > >> brought up support for RK3229. > >> > >> Signed-off-by: Frank Wang <frank.wang@rock-chips.com> [...] > >> + psci { > >> + compatible = "arm,psci-1.0", "arm,psci-0.2"; > >> + method = "smc"; > >> + }; > >> +}; > >> + > >> +&cpu0 { > >> + enable-method = "psci"; > >> +}; > > > > Hmm, I don't really understand this. > > What method of core-bringup does the rk3228 use? In the current > > rk322x.dtsi there is no enable-method at all defined. > > For non-security, the same with rk3036 SoC, we use rk3036-smp method to > bring-up cores, and for security, we use arm-psci method. > As security become more and more important and required, we would prefer > using arm-psci method, and it is also an easy way to use. > > > So is the rk3228 firmware using a different method than the rk3229? > > No, they are the same. How about I move these changes to rk322x.dtsi? yep, that is what I was getting at with my question ;-) > > And out of curiosity as this is a arm32 without atf, is the psci > > implementation (for uboot?) you're using available somewhere? > > Ah, it is included in op-tee :-) Is that super secret or will this be part of the official op-tee [0] at some point (Similar to the ATF stuff on arm64)? Heiko [0] https://github.com/OP-TEE/optee_os/tree/master/core/arch/arm -- To unsubscribe from this list: send the line "unsubscribe linux-mmc" in the body of a message to majordomo@vger.kernel.org More majordomo info at http://vger.kernel.org/majordomo-info.html
Hi Heiko, On 2017/6/19 20:30, Heiko Stübner wrote: > Hi Frank, > > Am Montag, 19. Juni 2017, 18:34:27 CEST schrieb Frank Wang: >> On 2017/6/18 2:12, Heiko Stuebner wrote: >>> Am Donnerstag, 15. Juni 2017, 15:16:15 CEST schrieb Frank Wang: >>>> Due to some tiny differences between RK3228 and RK3229, this patch >>>> adds a basic dtsi file which includes a new CPU opp table and PSCI >>>> brought up support for RK3229. >>>> >>>> Signed-off-by: Frank Wang<frank.wang@rock-chips.com> > [...] > >>>> + psci { >>>> + compatible = "arm,psci-1.0", "arm,psci-0.2"; >>>> + method = "smc"; >>>> + }; >>>> +}; >>>> + >>>> +&cpu0 { >>>> + enable-method = "psci"; >>>> +}; >>> Hmm, I don't really understand this. >>> What method of core-bringup does the rk3228 use? In the current >>> rk322x.dtsi there is no enable-method at all defined. >> For non-security, the same with rk3036 SoC, we use rk3036-smp method to >> bring-up cores, and for security, we use arm-psci method. >> As security become more and more important and required, we would prefer >> using arm-psci method, and it is also an easy way to use. >> >>> So is the rk3228 firmware using a different method than the rk3229? >> No, they are the same. How about I move these changes to rk322x.dtsi? > yep, that is what I was getting at with my question ;-) > > >>> And out of curiosity as this is a arm32 without atf, is the psci >>> implementation (for uboot?) you're using available somewhere? >> Ah, it is included in op-tee :-) > Is that super secret or will this be part of the official op-tee [0] > at some point (Similar to the ATF stuff on arm64)? Hmm, the op-tee itself must keep secure, but the psci part in it can be extracted to public, although it may have a bit of secure risk. Due to Rockchip have amended the frame of op-tee to support psci, we can try to upstream these changes to official op-tee or push them to source codes of Rockchip in git-hub. BR. Frank > Heiko > > [0]https://github.com/OP-TEE/optee_os/tree/master/core/arch/arm > > -- To unsubscribe from this list: send the line "unsubscribe linux-mmc" in the body of a message to majordomo@vger.kernel.org More majordomo info at http://vger.kernel.org/majordomo-info.html
Hi Frank, Am Dienstag, 20. Juni 2017, 15:13:00 CEST schrieb Frank Wang: > Hi Heiko, > > On 2017/6/19 20:30, Heiko Stübner wrote: > > Hi Frank, > > > > Am Montag, 19. Juni 2017, 18:34:27 CEST schrieb Frank Wang: > >> On 2017/6/18 2:12, Heiko Stuebner wrote: > >>> Am Donnerstag, 15. Juni 2017, 15:16:15 CEST schrieb Frank Wang: > >>>> Due to some tiny differences between RK3228 and RK3229, this patch > >>>> adds a basic dtsi file which includes a new CPU opp table and PSCI > >>>> brought up support for RK3229. > >>>> > >>>> Signed-off-by: Frank Wang<frank.wang@rock-chips.com> > > > > [...] > > > >>>> + psci { > >>>> + compatible = "arm,psci-1.0", "arm,psci-0.2"; > >>>> + method = "smc"; > >>>> + }; > >>>> +}; > >>>> + > >>>> +&cpu0 { > >>>> + enable-method = "psci"; > >>>> +}; > >>> > >>> Hmm, I don't really understand this. > >>> What method of core-bringup does the rk3228 use? In the current > >>> rk322x.dtsi there is no enable-method at all defined. > >> > >> For non-security, the same with rk3036 SoC, we use rk3036-smp method to > >> bring-up cores, and for security, we use arm-psci method. > >> As security become more and more important and required, we would prefer > >> using arm-psci method, and it is also an easy way to use. > >> > >>> So is the rk3228 firmware using a different method than the rk3229? > >> > >> No, they are the same. How about I move these changes to rk322x.dtsi? > > > > yep, that is what I was getting at with my question ;-) > > > >>> And out of curiosity as this is a arm32 without atf, is the psci > >>> implementation (for uboot?) you're using available somewhere? > >> > >> Ah, it is included in op-tee :-) > > > > Is that super secret or will this be part of the official op-tee [0] > > at some point (Similar to the ATF stuff on arm64)? > > Hmm, the op-tee itself must keep secure, but the psci part in it can be > extracted to public, although it may have a bit of secure risk. > Due to Rockchip have amended the frame of op-tee to support psci, we can > try to upstream these changes to official op-tee or push them to source > codes of Rockchip in git-hub. I just want to make sure, people can actually create a working system with this, as there is mainline u-boot support for the rk3228/rk3229 in the works - hopefully also with SPL support later on. So I'm wondering how this is supposed to be setup? On arm64 we now have the SPL load the ATF, which in turn loads uboot, so I guess the mechanism for the op-tee would be somehow similar? And there all necessary components are available to build everything from source. I really don't care about all the other super-secret stuff happening in that op-tee thingy, but I really want people to be able to build a complete firmware on their machine, without having to rely on arbitary binary blobs. Which is something companies adopting Rockchip socs seem to rely on a lot these days ;-) . One alternative I can think of, would be to also create a u-boot psci implementation for arm32, like sunxi [0] and others use for example. That way people could choose where their psci should come from (u-boot itself or the op-tee). Heiko [0] http://git.denx.de/?p=u-boot.git;a=blob;f=arch/arm/cpu/armv7/sunxi/psci.c > > > BR. > Frank > > > Heiko > > > > [0]https://github.com/OP-TEE/optee_os/tree/master/core/arch/arm -- To unsubscribe from this list: send the line "unsubscribe linux-mmc" in the body of a message to majordomo@vger.kernel.org More majordomo info at http://vger.kernel.org/majordomo-info.html
Hi Jacob and Heiko: On 2017年06月21日 12:11, Jacob Chen wrote: > Hi, > > 2017-06-20 18:48 GMT+08:00 Heiko Stübner <heiko@sntech.de > <mailto:heiko@sntech.de>>: > > Hi Frank, > > > > Am Dienstag, 20. Juni 2017, 15:13:00 CEST schrieb Frank Wang: > >> Hi Heiko, > >> > >> On 2017/6/19 20:30, Heiko Stübner wrote: > >> > Hi Frank, > >> > > >> > Am Montag, 19. Juni 2017, 18:34:27 CEST schrieb Frank Wang: > >> >> On 2017/6/18 2:12, Heiko Stuebner wrote: > >> >>> Am Donnerstag, 15. Juni 2017, 15:16:15 CEST schrieb Frank Wang: > >> >>>> Due to some tiny differences between RK3228 and RK3229, this patch > >> >>>> adds a basic dtsi file which includes a new CPU opp table and PSCI > >> >>>> brought up support for RK3229. > >> >>>> > >> >>>> Signed-off-by: Frank Wang<frank.wang@rock-chips.com > <mailto:frank.wang@rock-chips.com>> > >> > > >> > [...] > >> > > >> >>>> + psci { > >> >>>> + compatible = "arm,psci-1.0", "arm,psci-0.2"; > >> >>>> + method = "smc"; > >> >>>> + }; > >> >>>> +}; > >> >>>> + > >> >>>> +&cpu0 { > >> >>>> + enable-method = "psci"; > >> >>>> +}; > >> >>> > >> >>> Hmm, I don't really understand this. > >> >>> What method of core-bringup does the rk3228 use? In the current > >> >>> rk322x.dtsi there is no enable-method at all defined. > >> >> > >> >> For non-security, the same with rk3036 SoC, we use rk3036-smp > method to > >> >> bring-up cores, and for security, we use arm-psci method. > >> >> As security become more and more important and required, we > would prefer > >> >> using arm-psci method, and it is also an easy way to use. > >> >> > >> >>> So is the rk3228 firmware using a different method than the rk3229? > >> >> > >> >> No, they are the same. How about I move these changes to > rk322x.dtsi? > >> > > >> > yep, that is what I was getting at with my question ;-) > >> > > >> >>> And out of curiosity as this is a arm32 without atf, is the psci > >> >>> implementation (for uboot?) you're using available somewhere? > >> >> > >> >> Ah, it is included in op-tee :-) > >> > > >> > Is that super secret or will this be part of the official op-tee [0] > >> > at some point (Similar to the ATF stuff on arm64)? > >> > >> Hmm, the op-tee itself must keep secure, but the psci part in it can be > >> extracted to public, although it may have a bit of secure risk. > >> Due to Rockchip have amended the frame of op-tee to support psci, > we can > >> try to upstream these changes to official op-tee or push them to source > >> codes of Rockchip in git-hub. > > > > I just want to make sure, people can actually create a working system > > with this, as there is mainline u-boot support for the rk3228/rk3229 in > > the works - hopefully also with SPL support later on. > > So I'm wondering how this is supposed to be setup? > > > > On arm64 we now have the SPL load the ATF, which in turn loads > uboot, so I > > guess the mechanism for the op-tee would be somehow similar? And > there all > > necessary components are available to build everything from source. > > > > I really don't care about all the other super-secret stuff happening in > > that op-tee thingy, but I really want people to be able to build a > complete > > firmware on their machine, without having to rely on arbitary binary > blobs. > > > > Which is something companies adopting Rockchip socs seem to rely on > > a lot these days ;-) . > > > > > > One alternative I can think of, would be to also create a u-boot psci > > implementation for arm32, like sunxi [0] and others use for example. > > That way people could choose where their psci should come from (u-boot > > itself or the op-tee). > > > > > > Heiko > > > > [0] > http://git.denx.de/?p=u-boot.git;a=blob;f=arch/arm/cpu/armv7/sunxi/psci.c > > > >> > >> > >> BR. > >> Frank > >> > >> > Heiko > >> > > >> > [0]https://github.com/OP-TEE/optee_os/tree/master/core/arch/arm > > > > > >
Hi, Am Mittwoch, 21. Juni 2017, 15:29:18 CEST schrieb Huang, Tao: > Hi Jacob and Heiko: > > On 2017年06月21日 12:11, Jacob Chen wrote: > > Hi, > > > > 2017-06-20 18:48 GMT+08:00 Heiko Stübner <heiko@sntech.de > > > > <mailto:heiko@sntech.de>>: > > > Hi Frank, > > > > > > Am Dienstag, 20. Juni 2017, 15:13:00 CEST schrieb Frank Wang: > > >> Hi Heiko, > > >> > > >> On 2017/6/19 20:30, Heiko Stübner wrote: > > >> > Hi Frank, > > >> > > > >> > Am Montag, 19. Juni 2017, 18:34:27 CEST schrieb Frank Wang: > > >> >> On 2017/6/18 2:12, Heiko Stuebner wrote: > > >> >>> Am Donnerstag, 15. Juni 2017, 15:16:15 CEST schrieb Frank Wang: > > >> >>>> Due to some tiny differences between RK3228 and RK3229, this patch > > >> >>>> adds a basic dtsi file which includes a new CPU opp table and PSCI > > >> >>>> brought up support for RK3229. > > >> >>>> > > >> >>>> Signed-off-by: Frank Wang<frank.wang@rock-chips.com > > > > <mailto:frank.wang@rock-chips.com>> > > > > >> > [...] > > >> > > > >> >>>> + psci { > > >> >>>> + compatible = "arm,psci-1.0", "arm,psci-0.2"; > > >> >>>> + method = "smc"; > > >> >>>> + }; > > >> >>>> +}; > > >> >>>> + > > >> >>>> +&cpu0 { > > >> >>>> + enable-method = "psci"; > > >> >>>> +}; > > >> >>> > > >> >>> Hmm, I don't really understand this. > > >> >>> What method of core-bringup does the rk3228 use? In the current > > >> >>> rk322x.dtsi there is no enable-method at all defined. > > >> >> > > >> >> For non-security, the same with rk3036 SoC, we use rk3036-smp > > > > method to > > > > >> >> bring-up cores, and for security, we use arm-psci method. > > >> >> As security become more and more important and required, we > > > > would prefer > > > > >> >> using arm-psci method, and it is also an easy way to use. > > >> >> > > >> >>> So is the rk3228 firmware using a different method than the rk3229? > > >> >> > > >> >> No, they are the same. How about I move these changes to > > > > rk322x.dtsi? > > > > >> > yep, that is what I was getting at with my question ;-) > > >> > > > >> >>> And out of curiosity as this is a arm32 without atf, is the psci > > >> >>> implementation (for uboot?) you're using available somewhere? > > >> >> > > >> >> Ah, it is included in op-tee :-) > > >> > > > >> > Is that super secret or will this be part of the official op-tee [0] > > >> > at some point (Similar to the ATF stuff on arm64)? > > >> > > >> Hmm, the op-tee itself must keep secure, but the psci part in it can be > > >> extracted to public, although it may have a bit of secure risk. > > >> Due to Rockchip have amended the frame of op-tee to support psci, > > > > we can > > > > >> try to upstream these changes to official op-tee or push them to source > > >> codes of Rockchip in git-hub. > > > > > > I just want to make sure, people can actually create a working system > > > with this, as there is mainline u-boot support for the rk3228/rk3229 in > > > the works - hopefully also with SPL support later on. > > > So I'm wondering how this is supposed to be setup? > > > > > > On arm64 we now have the SPL load the ATF, which in turn loads > > > > uboot, so I > > > > > guess the mechanism for the op-tee would be somehow similar? And > > > > there all > > > > > necessary components are available to build everything from source. > > > > > > I really don't care about all the other super-secret stuff happening in > > > that op-tee thingy, but I really want people to be able to build a > > > > complete > > > > > firmware on their machine, without having to rely on arbitary binary > > > > blobs. > > > > > Which is something companies adopting Rockchip socs seem to rely on > > > a lot these days ;-) . > > > > > > > > > One alternative I can think of, would be to also create a u-boot psci > > > implementation for arm32, like sunxi [0] and others use for example. > > > That way people could choose where their psci should come from (u-boot > > > itself or the op-tee). > > > > > > > > > Heiko > > > > > > [0] > > > > http://git.denx.de/?p=u-boot.git;a=blob;f=arch/arm/cpu/armv7/sunxi/psci.c > > > > >> BR. > > >> Frank > > >> > > >> > Heiko > > >> > > > >> > [0]https://github.com/OP-TEE/optee_os/tree/master/core/arch/arm > > > >
diff --git a/arch/arm/boot/dts/rk3229-evb.dts b/arch/arm/boot/dts/rk3229-evb.dts index 1b55192..82e8a53 100644 --- a/arch/arm/boot/dts/rk3229-evb.dts +++ b/arch/arm/boot/dts/rk3229-evb.dts @@ -40,7 +40,7 @@ /dts-v1/; -#include "rk322x.dtsi" +#include "rk3229.dtsi" / { model = "Rockchip RK3229 Evaluation board"; diff --git a/arch/arm/boot/dts/rk3229.dtsi b/arch/arm/boot/dts/rk3229.dtsi new file mode 100644 index 0000000..d43d133 --- /dev/null +++ b/arch/arm/boot/dts/rk3229.dtsi @@ -0,0 +1,110 @@ +/* + * Copyright (c) 2017 Fuzhou Rockchip Electronics Co., Ltd + * + * This file is dual-licensed: you can use it either under the terms + * of the GPL or the X11 license, at your option. Note that this dual + * licensing only applies to this file, and not this project as a + * whole. + * + * a) This library is free software; you can redistribute it and/or + * modify it under the terms of the GNU General Public License as + * published by the Free Software Foundation; either version 2 of the + * License, or (at your option) any later version. + * + * This library is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + * + * Or, alternatively, + * + * b) Permission is hereby granted, free of charge, to any person + * obtaining a copy of this software and associated documentation + * files (the "Software"), to deal in the Software without + * restriction, including without limitation the rights to use, + * copy, modify, merge, publish, distribute, sublicense, and/or + * sell copies of the Software, and to permit persons to whom the + * Software is furnished to do so, subject to the following + * conditions: + * + * The above copyright notice and this permission notice shall be + * included in all copies or substantial portions of the Software. + * + * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, + * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES + * OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND + * NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT + * HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, + * WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING + * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR + * OTHER DEALINGS IN THE SOFTWARE. + */ + +#include "rk322x.dtsi" + +/ { + compatible = "rockchip,rk3229"; + + /delete-node/ opp-table0; + + cpu0_opp_table: opp_table0 { + compatible = "operating-points-v2"; + opp-shared; + + opp-408000000 { + opp-hz = /bits/ 64 <408000000>; + opp-microvolt = <950000>; + clock-latency-ns = <40000>; + opp-suspend; + }; + opp-600000000 { + opp-hz = /bits/ 64 <600000000>; + opp-microvolt = <975000>; + }; + opp-816000000 { + opp-hz = /bits/ 64 <816000000>; + opp-microvolt = <1000000>; + }; + opp-1008000000 { + opp-hz = /bits/ 64 <1008000000>; + opp-microvolt = <1175000>; + }; + opp-1200000000 { + opp-hz = /bits/ 64 <1200000000>; + opp-microvolt = <1275000>; + }; + opp-1296000000 { + opp-hz = /bits/ 64 <1296000000>; + opp-microvolt = <1325000>; + }; + opp-1392000000 { + opp-hz = /bits/ 64 <1392000000>; + opp-microvolt = <1375000>; + }; + opp-1464000000 { + opp-hz = /bits/ 64 <1464000000>; + opp-microvolt = <1400000>; + }; + }; + + psci { + compatible = "arm,psci-1.0", "arm,psci-0.2"; + method = "smc"; + }; +}; + +&cpu0 { + enable-method = "psci"; +}; + +&cpu1 { + enable-method = "psci"; +}; + +&cpu2 { + enable-method = "psci"; +}; + +&cpu3 { + enable-method = "psci"; +};
Due to some tiny differences between RK3228 and RK3229, this patch adds a basic dtsi file which includes a new CPU opp table and PSCI brought up support for RK3229. Signed-off-by: Frank Wang <frank.wang@rock-chips.com> --- arch/arm/boot/dts/rk3229-evb.dts | 2 +- arch/arm/boot/dts/rk3229.dtsi | 110 +++++++++++++++++++++++++++++++++++++++ 2 files changed, 111 insertions(+), 1 deletion(-) create mode 100644 arch/arm/boot/dts/rk3229.dtsi