From patchwork Tue Mar 6 06:58:50 2018 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Shawn Guo X-Patchwork-Id: 10260851 Return-Path: Received: from mail.wl.linuxfoundation.org (pdx-wl-mail.web.codeaurora.org [172.30.200.125]) by pdx-korg-patchwork.web.codeaurora.org (Postfix) with ESMTP id A9DA9602C8 for ; Tue, 6 Mar 2018 06:59:45 +0000 (UTC) Received: from mail.wl.linuxfoundation.org (localhost [127.0.0.1]) by mail.wl.linuxfoundation.org (Postfix) with ESMTP id 99F1728788 for ; Tue, 6 Mar 2018 06:59:45 +0000 (UTC) Received: by mail.wl.linuxfoundation.org (Postfix, from userid 486) id 8E5B928E6F; Tue, 6 Mar 2018 06:59:45 +0000 (UTC) X-Spam-Checker-Version: SpamAssassin 3.3.1 (2010-03-16) on pdx-wl-mail.web.codeaurora.org X-Spam-Level: X-Spam-Status: No, score=-6.8 required=2.0 tests=BAYES_00,DKIM_SIGNED, RCVD_IN_DNSWL_HI,T_DKIM_INVALID autolearn=ham version=3.3.1 Received: from vger.kernel.org (vger.kernel.org [209.132.180.67]) by mail.wl.linuxfoundation.org (Postfix) with ESMTP id 1374B28788 for ; Tue, 6 Mar 2018 06:59:45 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1751028AbeCFG7o (ORCPT ); Tue, 6 Mar 2018 01:59:44 -0500 Received: from mail-pf0-f194.google.com ([209.85.192.194]:42250 "EHLO mail-pf0-f194.google.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1750896AbeCFG7n (ORCPT ); Tue, 6 Mar 2018 01:59:43 -0500 Received: by mail-pf0-f194.google.com with SMTP id a16so8377111pfn.9 for ; Mon, 05 Mar 2018 22:59:43 -0800 (PST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=linaro.org; s=google; h=from:to:cc:subject:date:message-id:in-reply-to:references; bh=C3pV6OmFxr+gO/+4U2J32o8ee7tSQKAkmQyClntE7ZA=; b=QHAnW6xr9ZUpSjaD//lyQ4u7rvBquwI6GPZqO8MKnJzVoMjKMD/XApPu1k9wbhfXpP 2Ktt823bwF2T/ob6dqI3waF2DjRa8xnyQvrS9/Gm0KwbcqNCA8YOiztVjBq+x4Cz5PF0 Le1VbwYARg1U0CNY1z9pPRjItt9CK/uZ5pVhs= X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20161025; h=x-gm-message-state:from:to:cc:subject:date:message-id:in-reply-to :references; bh=C3pV6OmFxr+gO/+4U2J32o8ee7tSQKAkmQyClntE7ZA=; b=pBNHoWUqUUlxcGJEAH34J1Dueb/URLuRzx7/TPnJulUgoOGl9ii8BHuPL4KbKq3fZw vHX9/XQ5OtwkfErcW38iRHTMV+3Lm0NEqCxnLEJFUovaAisbhGL5mBmXZ/ehbwhFXtBC CFf0ujPeZSlxlvT9gxxVDEbGSHWQh7xwJH0TzDJsbtyzCC4VgEHFprQwENSJC0xgHiJE /0UiZUF2Vyq/2tbXPjanboDg82/vx1W4+bbW7UeQoC8SA3QXxtARSC5jk6o4sHmF/9GA vSXtscjYrMxuFyW1aN44lloH51i6UCO9+PHtKZg6y11oOob4zYdr6tIaTLR+nv2FhCkd 4vcg== X-Gm-Message-State: APf1xPCLXzWFo1OQNUCMCzQW2+GtORi4fQTyn1Mb83GSKgkA8z/NZVyz bmaguyQqsXAVw4SzhUWcTzRxkg== X-Google-Smtp-Source: AG47ELuVxDzTHAtqSYRygfQyqqajXhVCcE5chFvIJAcSPJzmGMkBL89ejf7j4wAna4nPGUr83BU57A== X-Received: by 10.98.102.155 with SMTP id s27mr18147285pfj.198.1520319582778; Mon, 05 Mar 2018 22:59:42 -0800 (PST) Received: from localhost.localdomain ([104.237.91.63]) by smtp.gmail.com with ESMTPSA id p12sm24023012pgn.91.2018.03.05.22.59.37 (version=TLS1_2 cipher=ECDHE-RSA-AES128-SHA bits=128/128); Mon, 05 Mar 2018 22:59:40 -0800 (PST) From: Shawn Guo To: Ulf Hansson Cc: Jaehoon Chung , Rob Herring , tianshuliang , Jiancheng Xue , devicetree@vger.kernel.org, linux-mmc@vger.kernel.org, Shawn Guo Subject: [PATCH v2 1/2] dt-bindings: mmc: add bindings for hi3798cv200-dw-mshc Date: Tue, 6 Mar 2018 14:58:50 +0800 Message-Id: <1520319531-24661-2-git-send-email-shawn.guo@linaro.org> X-Mailer: git-send-email 1.9.1 In-Reply-To: <1520319531-24661-1-git-send-email-shawn.guo@linaro.org> References: <1520319531-24661-1-git-send-email-shawn.guo@linaro.org> Sender: linux-mmc-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-mmc@vger.kernel.org X-Virus-Scanned: ClamAV using ClamSMTP From: tianshuliang Hisilicon hi3798cv200 SoC extends the dw-mshc controller for additional clock control. Add device tree bindings for hi3798cv200-dw-mshc. Signed-off-by: tianshuliang Signed-off-by: Jiancheng Xue Signed-off-by: Shawn Guo Reviewed-by: Rob Herring --- .../bindings/mmc/hi3798cv200-dw-mshc.txt | 40 ++++++++++++++++++++++ 1 file changed, 40 insertions(+) create mode 100644 Documentation/devicetree/bindings/mmc/hi3798cv200-dw-mshc.txt diff --git a/Documentation/devicetree/bindings/mmc/hi3798cv200-dw-mshc.txt b/Documentation/devicetree/bindings/mmc/hi3798cv200-dw-mshc.txt new file mode 100644 index 000000000000..a0693b7145f2 --- /dev/null +++ b/Documentation/devicetree/bindings/mmc/hi3798cv200-dw-mshc.txt @@ -0,0 +1,40 @@ +* Hisilicon Hi3798CV200 specific extensions to the Synopsys Designware Mobile + Storage Host Controller + +Read synopsys-dw-mshc.txt for more details + +The Synopsys designware mobile storage host controller is used to interface +a SoC with storage medium such as eMMC or SD/MMC cards. This file documents +differences between the core Synopsys dw mshc controller properties described +by synopsys-dw-mshc.txt and the properties used by the Hisilicon Hi3798CV200 +specific extensions to the Synopsys Designware Mobile Storage Host Controller. + +Required Properties: +- compatible: Should contain "hisilicon,hi3798cv200-dw-mshc". +- clocks: A list of phandle + clock-specifier pairs for the clocks listed + in clock-names. +- clock-names: Should contain the following: + "ciu" - The ciu clock described in synopsys-dw-mshc.txt. + "biu" - The biu clock described in synopsys-dw-mshc.txt. + "ciu-sample" - Hi3798CV200 extended phase clock for ciu sampling. + "ciu-drive" - Hi3798CV200 extended phase clock for ciu driving. + +Example: + + emmc: mmc@9830000 { + compatible = "hisilicon,hi3798cv200-dw-mshc"; + reg = <0x9830000 0x10000>; + interrupts = ; + clocks = <&crg HISTB_MMC_CIU_CLK>, + <&crg HISTB_MMC_BIU_CLK>, + <&crg HISTB_MMC_SAMPLE_CLK>, + <&crg HISTB_MMC_DRV_CLK>; + clock-names = "ciu", "biu", "ciu-sample", "ciu-drive"; + fifo-depth = <256>; + clock-frequency = <200000000>; + cap-mmc-highspeed; + mmc-ddr-1_8v; + mmc-hs200-1_8v; + non-removable; + bus-width = <8>; + };