From patchwork Tue Mar 20 08:36:24 2018 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Chunyan Zhang X-Patchwork-Id: 10296661 Return-Path: Received: from mail.wl.linuxfoundation.org (pdx-wl-mail.web.codeaurora.org [172.30.200.125]) by pdx-korg-patchwork.web.codeaurora.org (Postfix) with ESMTP id 5A3DF602B3 for ; Tue, 20 Mar 2018 08:37:19 +0000 (UTC) Received: from mail.wl.linuxfoundation.org (localhost [127.0.0.1]) by mail.wl.linuxfoundation.org (Postfix) with ESMTP id 4C0F02953D for ; Tue, 20 Mar 2018 08:37:19 +0000 (UTC) Received: by mail.wl.linuxfoundation.org (Postfix, from userid 486) id 4032A29560; Tue, 20 Mar 2018 08:37:19 +0000 (UTC) X-Spam-Checker-Version: SpamAssassin 3.3.1 (2010-03-16) on pdx-wl-mail.web.codeaurora.org X-Spam-Level: X-Spam-Status: No, score=-6.8 required=2.0 tests=BAYES_00,DKIM_SIGNED, RCVD_IN_DNSWL_HI,T_DKIM_INVALID autolearn=ham version=3.3.1 Received: from vger.kernel.org (vger.kernel.org [209.132.180.67]) by mail.wl.linuxfoundation.org (Postfix) with ESMTP id D893F2953D for ; Tue, 20 Mar 2018 08:37:18 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1752279AbeCTIgv (ORCPT ); Tue, 20 Mar 2018 04:36:51 -0400 Received: from mail-pg0-f65.google.com ([74.125.83.65]:43723 "EHLO mail-pg0-f65.google.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1752261AbeCTIgr (ORCPT ); Tue, 20 Mar 2018 04:36:47 -0400 Received: by mail-pg0-f65.google.com with SMTP id i9so359541pgq.10 for ; Tue, 20 Mar 2018 01:36:47 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=linaro.org; s=google; h=from:to:cc:subject:date:message-id:in-reply-to:references; bh=6pLv/ZEEGj3Egz5P3wvQC154jeCusay4stgycogIkLo=; b=BHgQ1j69RoA3fDFkmVXsjBnX4DO6Hgp1O3t9+E5R/MwXIGSSKPx3pu1p7dqaPHTyPA xaZ1+p2IgL2HWsbFtX1F73G49l3A0x70h9nGfvaO5dbAjEEN07VK4BSIPQtpIl6+J+Zp 2cj8/ckCWN45Bpg/ns4ooeEsZeIaeY+Uml6X0= X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20161025; h=x-gm-message-state:from:to:cc:subject:date:message-id:in-reply-to :references; bh=6pLv/ZEEGj3Egz5P3wvQC154jeCusay4stgycogIkLo=; b=I88W4me0WgDEoM3Og5nLWFgMrzqKLGAS8nBtStAYSlKX18vi+EOdmQB1Mb62YX4MKg 9ftxi04/P8R4kIc1JUH3x3+CY04791CrpzkfS9UN8AS2XFHhVRMXHO3m4+TYM9YGpioW SeHba9kF1HDoB2l3Q/4yte0j29mSyvSMCzktqw+/jwhSk/8KsDEi7azIUPj+ZTr0tdal JCoC3i8pKA90JtZ9hVQzb3WibC4IT6LjJRoiab2+sCflGzPKAvsg3XgNzHVRta+WNgTQ UJu6824NGY7f8MUo4OFNc8D9QZYWimzQPs0ZL5+9dypAj/a6qNV66aBcF93F7Vtkya2w 1kyQ== X-Gm-Message-State: AElRT7FCoJlBbPu96YE/jZqWW+NK+GncTnEN1dVZFdaJqjfi3b6aQpTQ 0ztmW2v059KZ/lQ79K/ErY6V4g== X-Google-Smtp-Source: AG47ELs+R34uFNPL1Gr84dAAMQ70SHe86tW3XBUfW2mtVoDvEkGzn63ZT0xodrLE1suPZYJ4YTHbyQ== X-Received: by 10.98.74.143 with SMTP id c15mr12955219pfj.83.1521535006787; Tue, 20 Mar 2018 01:36:46 -0700 (PDT) Received: from ubt.spreadtrum.com ([117.18.48.82]) by smtp.gmail.com with ESMTPSA id q62sm2590048pfd.61.2018.03.20.01.36.43 (version=TLS1_2 cipher=ECDHE-RSA-AES128-SHA bits=128/128); Tue, 20 Mar 2018 01:36:46 -0700 (PDT) From: Chunyan Zhang To: Ulf Hansson , Adrian Hunter Cc: linux-mmc@vger.kernel.org, linux-kernel@vger.kernel.org, Arnd Bergmann , Mark Brown , Billows Wu , Chunyan Zhang Subject: [PATCH 1/3] mmc: sdhci: add sd host v4 mode Date: Tue, 20 Mar 2018 16:36:24 +0800 Message-Id: <1521534986-21907-2-git-send-email-zhang.chunyan@linaro.org> X-Mailer: git-send-email 2.7.4 In-Reply-To: <1521534986-21907-1-git-send-email-zhang.chunyan@linaro.org> References: <1521534986-21907-1-git-send-email-zhang.chunyan@linaro.org> Sender: linux-mmc-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-mmc@vger.kernel.org X-Virus-Scanned: ClamAV using ClamSMTP For SD host controller version 4.00 or later ones, there're two modes of implementation - Version 3.00 compatible mode or Version 4 mode. This patch introduces a flag to record this. Signed-off-by: Chunyan Zhang --- drivers/mmc/host/sdhci.c | 6 ++++++ drivers/mmc/host/sdhci.h | 6 ++++++ 2 files changed, 12 insertions(+) diff --git a/drivers/mmc/host/sdhci.c b/drivers/mmc/host/sdhci.c index 2020e57..da4d91e 100644 --- a/drivers/mmc/host/sdhci.c +++ b/drivers/mmc/host/sdhci.c @@ -3289,6 +3289,12 @@ void __sdhci_read_caps(struct sdhci_host *host, u16 *ver, u32 *caps, u32 *caps1) v = ver ? *ver : sdhci_readw(host, SDHCI_HOST_VERSION); host->version = (v & SDHCI_SPEC_VER_MASK) >> SDHCI_SPEC_VER_SHIFT; + if (host->version >= SDHCI_SPEC_400) { + if (sdhci_readw(host, SDHCI_HOST_CONTROL2) & + SDHCI_CTRL_V4_MODE) + host->v4_mode = true; + } + if (host->quirks & SDHCI_QUIRK_MISSING_CAPS) return; diff --git a/drivers/mmc/host/sdhci.h b/drivers/mmc/host/sdhci.h index c95b0a4..128b0ba 100644 --- a/drivers/mmc/host/sdhci.h +++ b/drivers/mmc/host/sdhci.h @@ -184,6 +184,7 @@ #define SDHCI_CTRL_DRV_TYPE_D 0x0030 #define SDHCI_CTRL_EXEC_TUNING 0x0040 #define SDHCI_CTRL_TUNED_CLK 0x0080 +#define SDHCI_CTRL_V4_MODE 0x1000 #define SDHCI_CTRL_PRESET_VAL_ENABLE 0x8000 #define SDHCI_CAPABILITIES 0x40 @@ -270,6 +271,8 @@ #define SDHCI_SPEC_100 0 #define SDHCI_SPEC_200 1 #define SDHCI_SPEC_300 2 +#define SDHCI_SPEC_400 3 +#define SDHCI_SPEC_410 4 /* * End of controller registers. @@ -551,6 +554,9 @@ struct sdhci_host { u32 sdma_boundary; unsigned long private[0] ____cacheline_aligned; + + /* Host Version 4 Enable */ + bool v4_mode; }; struct sdhci_ops {