From patchwork Fri Jun 8 08:18:11 2018 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Chunyan Zhang X-Patchwork-Id: 10453953 Return-Path: Received: from mail.wl.linuxfoundation.org (pdx-wl-mail.web.codeaurora.org [172.30.200.125]) by pdx-korg-patchwork.web.codeaurora.org (Postfix) with ESMTP id C1AAF60467 for ; Fri, 8 Jun 2018 08:25:41 +0000 (UTC) Received: from mail.wl.linuxfoundation.org (localhost [127.0.0.1]) by mail.wl.linuxfoundation.org (Postfix) with ESMTP id AEEC329298 for ; Fri, 8 Jun 2018 08:25:41 +0000 (UTC) Received: by mail.wl.linuxfoundation.org (Postfix, from userid 486) id A3BA9292B0; Fri, 8 Jun 2018 08:25:41 +0000 (UTC) X-Spam-Checker-Version: SpamAssassin 3.3.1 (2010-03-16) on pdx-wl-mail.web.codeaurora.org X-Spam-Level: X-Spam-Status: No, score=-7.8 required=2.0 tests=BAYES_00,DKIM_SIGNED, MAILING_LIST_MULTI, RCVD_IN_DNSWL_HI, T_DKIM_INVALID autolearn=ham version=3.3.1 Received: from vger.kernel.org (vger.kernel.org [209.132.180.67]) by mail.wl.linuxfoundation.org (Postfix) with ESMTP id 53A6229298 for ; Fri, 8 Jun 2018 08:25:41 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1751504AbeFHITU (ORCPT ); Fri, 8 Jun 2018 04:19:20 -0400 Received: from mail-pl0-f67.google.com ([209.85.160.67]:42650 "EHLO mail-pl0-f67.google.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1752853AbeFHITP (ORCPT ); Fri, 8 Jun 2018 04:19:15 -0400 Received: by mail-pl0-f67.google.com with SMTP id w17-v6so7859346pll.9 for ; Fri, 08 Jun 2018 01:19:15 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=linaro.org; s=google; h=from:to:cc:subject:date:message-id:in-reply-to:references; bh=2kKdK2qZqm7YxqxQreraVLLw0s8TN4UgsB3k/YpdPQI=; b=eMu3uV+FIFUH5dBfHJQiTcF0H8MCPRxIB+C1Z8BezzykBY/c9VijVF7D+18wXIupGp 9aY28w3zMYMd9f4wZZWE//C9ccivy+hltm8SjDk5jBnJGI5a+lUBK1LuAlkY6UTSbi+2 lt+JsJqsQ9mWalp1GrUydWKAmewnFKaXj9XeM= X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20161025; h=x-gm-message-state:from:to:cc:subject:date:message-id:in-reply-to :references; bh=2kKdK2qZqm7YxqxQreraVLLw0s8TN4UgsB3k/YpdPQI=; b=P9ErrkK57WClAoxlAj8hKfUEvAo6RqjMFYeBi1nlf1VtEMPn6RHwZLrRvtY0dnauRH BqeUceUrt0EjZ5+RWFD14YGrVS/h8yf2Dyp5P/CrOasTv/ntDbZZ5453NNFMjfYKHxSN /yiXWAtw4iD0MNhYSRfYa2vgFqVPqtFQ2XPXIpWqe+otpWl3lCiXH67HHh7ixx6tc9f6 hmZuWu5etmbrUnohpnxu+SMEQ0puMYxV19iZ9VnHtEG8sjlAhWP1ZKdQ0+qQVTI26rK+ DyrtPrbasD+fUdb1ZMlw2XZhnHxK0CXA/tVGmi4uK+qGO4wHeqb4gjbXWlRCvdHSVtHw 3ZDw== X-Gm-Message-State: APt69E1CiXoweiyhIdv7wWqSVXw8vbuzSc+mj9jxIaUk4jje63J24HmP eXttnJcPRGE/RIbU6DH5VaHnpw== X-Google-Smtp-Source: ADUXVKIUuLi1glU/e8hqbQE0DObSJSYswciFEi/IT+z1kGiHRXqdrtgswWoPT4Q7+dU+qS46Y13jBA== X-Received: by 2002:a17:902:8f8b:: with SMTP id z11-v6mr5516405plo.203.1528445954765; Fri, 08 Jun 2018 01:19:14 -0700 (PDT) Received: from ubt.spreadtrum.com ([117.18.48.102]) by smtp.gmail.com with ESMTPSA id s4-v6sm72243947pgp.35.2018.06.08.01.19.11 (version=TLS1_2 cipher=ECDHE-RSA-AES128-SHA bits=128/128); Fri, 08 Jun 2018 01:19:13 -0700 (PDT) From: Chunyan Zhang To: Ulf Hansson , Adrian Hunter Cc: linux-mmc@vger.kernel.org, linux-kernel@vger.kernel.org, Orson Zhai , Baolin Wang , Billows Wu , zhang.lyra@gmail.com Subject: [PATCH 4/6] mmc: sdhci: add 32-bit block count support for v4 mode Date: Fri, 8 Jun 2018 16:18:11 +0800 Message-Id: <1528445893-14530-5-git-send-email-zhang.chunyan@linaro.org> X-Mailer: git-send-email 2.7.4 In-Reply-To: <1528445893-14530-1-git-send-email-zhang.chunyan@linaro.org> References: <1528445893-14530-1-git-send-email-zhang.chunyan@linaro.org> Sender: linux-mmc-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-mmc@vger.kernel.org X-Virus-Scanned: ClamAV using ClamSMTP When Host Version 4 is enabled, SDMA System Address register is re-defined as 32-bit Block Count, and SDMA uses ADMA System Address register (05Fh-058h) instead. Signed-off-by: Chunyan Zhang --- drivers/mmc/host/sdhci.c | 3 ++- drivers/mmc/host/sdhci.h | 1 + 2 files changed, 3 insertions(+), 1 deletion(-) diff --git a/drivers/mmc/host/sdhci.c b/drivers/mmc/host/sdhci.c index 5d3b0d8..b8ee124 100644 --- a/drivers/mmc/host/sdhci.c +++ b/drivers/mmc/host/sdhci.c @@ -943,7 +943,8 @@ static void sdhci_prepare_data(struct sdhci_host *host, struct mmc_command *cmd) /* Set the DMA boundary value and block size */ sdhci_writew(host, SDHCI_MAKE_BLKSZ(host->sdma_boundary, data->blksz), SDHCI_BLOCK_SIZE); - sdhci_writew(host, data->blocks, SDHCI_BLOCK_COUNT); + reg = host->v4_mode ? SDHCI_32BIT_BLK_CNT : SDHCI_BLOCK_COUNT; + sdhci_writew(host, data->blocks, reg); } static inline bool sdhci_auto_cmd12(struct sdhci_host *host, diff --git a/drivers/mmc/host/sdhci.h b/drivers/mmc/host/sdhci.h index 820a863..1e84539 100644 --- a/drivers/mmc/host/sdhci.h +++ b/drivers/mmc/host/sdhci.h @@ -28,6 +28,7 @@ #define SDHCI_DMA_ADDRESS 0x00 #define SDHCI_ARGUMENT2 SDHCI_DMA_ADDRESS +#define SDHCI_32BIT_BLK_CNT SDHCI_DMA_ADDRESS #define SDHCI_BLOCK_SIZE 0x04 #define SDHCI_MAKE_BLKSZ(dma, blksz) (((dma & 0x7) << 12) | (blksz & 0xFFF))