From patchwork Fri Jun 15 02:04:09 2018 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Chunyan Zhang X-Patchwork-Id: 10465583 Return-Path: Received: from mail.wl.linuxfoundation.org (pdx-wl-mail.web.codeaurora.org [172.30.200.125]) by pdx-korg-patchwork.web.codeaurora.org (Postfix) with ESMTP id 86764603B4 for ; Fri, 15 Jun 2018 02:06:23 +0000 (UTC) Received: from mail.wl.linuxfoundation.org (localhost [127.0.0.1]) by mail.wl.linuxfoundation.org (Postfix) with ESMTP id 7704028CDC for ; Fri, 15 Jun 2018 02:06:23 +0000 (UTC) Received: by mail.wl.linuxfoundation.org (Postfix, from userid 486) id 6A33D28CE4; Fri, 15 Jun 2018 02:06:23 +0000 (UTC) X-Spam-Checker-Version: SpamAssassin 3.3.1 (2010-03-16) on pdx-wl-mail.web.codeaurora.org X-Spam-Level: X-Spam-Status: No, score=-7.8 required=2.0 tests=BAYES_00,DKIM_SIGNED, MAILING_LIST_MULTI, RCVD_IN_DNSWL_HI, T_DKIM_INVALID autolearn=ham version=3.3.1 Received: from vger.kernel.org (vger.kernel.org [209.132.180.67]) by mail.wl.linuxfoundation.org (Postfix) with ESMTP id 14F7728CDC for ; Fri, 15 Jun 2018 02:06:23 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S965392AbeFOCEs (ORCPT ); Thu, 14 Jun 2018 22:04:48 -0400 Received: from mail-pl0-f65.google.com ([209.85.160.65]:42496 "EHLO mail-pl0-f65.google.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S965072AbeFOCEq (ORCPT ); Thu, 14 Jun 2018 22:04:46 -0400 Received: by mail-pl0-f65.google.com with SMTP id w17-v6so4535250pll.9 for ; Thu, 14 Jun 2018 19:04:46 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=linaro.org; s=google; h=from:to:cc:subject:date:message-id:in-reply-to:references; bh=3FkQjw0tnznQzkqhNl9915wjCXW19DdBddES+/u0pdI=; b=HW9zZO7hejz4TlVe51+27U2fh7I5Dalfh8DeArj+79MNzXuIuQKK5UVBqsy5zGzGnN +ld7wC66ouHlRr0BQqIyEeThpwkxG+A0PMhLIkQ9ZXo6AkdXw8xJRi3X0bpZy0oR2Fyn Cm0gerReU3XWKqHLfnkAux0dDXy8USsYuZwl4= X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20161025; h=x-gm-message-state:from:to:cc:subject:date:message-id:in-reply-to :references; bh=3FkQjw0tnznQzkqhNl9915wjCXW19DdBddES+/u0pdI=; b=Qgfs3lQJsXPedd7+PKlUmLv7quQZHUuXLc3xh7dnhBW66IsNbKjzQWIYaN2KKAqg8o 5aRqnGHMuZDvvXW3XlqQs1eADgZmxqs9H2HHBC3QaY/8/8b03jNPB+eJYknV2gabLyra opNfJllnW76yg+8wEUBebLWmbgn0RP4D0EZey2CgODmiE6ah5ZJCg8ZkHVf8+8z200LZ b690saQRKYMI+f37zJFbak92mBiTPGGkUuDR5lymeM/hq67jdrjsBdEiwA3wpUqxssV8 GtpICBCY6R5Rf27WdAJF8o15f7HW856PBHqj1+YD4MB/z6FEEPqWJR0s8EM15W4gT/Dt qfOg== X-Gm-Message-State: APt69E0bsT6nK865OGQErFv8ffDNB7DWmvSpQbeWNxkpJ7VOnYEn22y2 Zz9nbK5zqOGvyNOFkK+ZkUd1tQ== X-Google-Smtp-Source: ADUXVKKaCGsR6vcY1oFH2LGwVuyJlxvnQIl5CQosV3hG+22Y4qWGZNQo/AT05p/En4elcHTmpZ66Og== X-Received: by 2002:a17:902:4203:: with SMTP id g3-v6mr5588112pld.315.1529028286198; Thu, 14 Jun 2018 19:04:46 -0700 (PDT) Received: from ubt.spreadtrum.com ([117.18.48.102]) by smtp.gmail.com with ESMTPSA id k69-v6sm9504953pgc.39.2018.06.14.19.04.38 (version=TLS1_2 cipher=ECDHE-RSA-AES128-SHA bits=128/128); Thu, 14 Jun 2018 19:04:45 -0700 (PDT) From: Chunyan Zhang To: Ulf Hansson , Adrian Hunter Cc: linux-mmc@vger.kernel.org, linux-kernel@vger.kernel.org, Orson Zhai , Baolin Wang , Billows Wu , zhang.lyra@gmail.com Subject: [PATCH V2 1/7] mmc: sdhci: add sd host v4 mode Date: Fri, 15 Jun 2018 10:04:09 +0800 Message-Id: <1529028255-6022-2-git-send-email-zhang.chunyan@linaro.org> X-Mailer: git-send-email 2.7.4 In-Reply-To: <1529028255-6022-1-git-send-email-zhang.chunyan@linaro.org> References: <1529028255-6022-1-git-send-email-zhang.chunyan@linaro.org> Sender: linux-mmc-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-mmc@vger.kernel.org X-Virus-Scanned: ClamAV using ClamSMTP For SD host controller version 4.00 or later ones, there're two modes of implementation - Version 3.00 compatible mode or Version 4 mode. This patch introduces a flag to record this. Signed-off-by: Chunyan Zhang --- drivers/mmc/host/sdhci.c | 6 ++++++ drivers/mmc/host/sdhci.h | 6 ++++++ 2 files changed, 12 insertions(+) diff --git a/drivers/mmc/host/sdhci.c b/drivers/mmc/host/sdhci.c index 2ededa7f..cf5695f 100644 --- a/drivers/mmc/host/sdhci.c +++ b/drivers/mmc/host/sdhci.c @@ -3302,6 +3302,12 @@ void __sdhci_read_caps(struct sdhci_host *host, u16 *ver, u32 *caps, u32 *caps1) v = ver ? *ver : sdhci_readw(host, SDHCI_HOST_VERSION); host->version = (v & SDHCI_SPEC_VER_MASK) >> SDHCI_SPEC_VER_SHIFT; + if (host->version >= SDHCI_SPEC_400) { + if (sdhci_readw(host, SDHCI_HOST_CONTROL2) & + SDHCI_CTRL_V4_MODE) + host->v4_mode = true; + } + if (host->quirks & SDHCI_QUIRK_MISSING_CAPS) return; diff --git a/drivers/mmc/host/sdhci.h b/drivers/mmc/host/sdhci.h index c95b0a4..128b0ba 100644 --- a/drivers/mmc/host/sdhci.h +++ b/drivers/mmc/host/sdhci.h @@ -184,6 +184,7 @@ #define SDHCI_CTRL_DRV_TYPE_D 0x0030 #define SDHCI_CTRL_EXEC_TUNING 0x0040 #define SDHCI_CTRL_TUNED_CLK 0x0080 +#define SDHCI_CTRL_V4_MODE 0x1000 #define SDHCI_CTRL_PRESET_VAL_ENABLE 0x8000 #define SDHCI_CAPABILITIES 0x40 @@ -270,6 +271,8 @@ #define SDHCI_SPEC_100 0 #define SDHCI_SPEC_200 1 #define SDHCI_SPEC_300 2 +#define SDHCI_SPEC_400 3 +#define SDHCI_SPEC_410 4 /* * End of controller registers. @@ -551,6 +554,9 @@ struct sdhci_host { u32 sdma_boundary; unsigned long private[0] ____cacheline_aligned; + + /* Host Version 4 Enable */ + bool v4_mode; }; struct sdhci_ops {