From patchwork Mon Jul 9 03:19:55 2018 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Chunyan Zhang X-Patchwork-Id: 10513457 Return-Path: Received: from mail.wl.linuxfoundation.org (pdx-wl-mail.web.codeaurora.org [172.30.200.125]) by pdx-korg-patchwork.web.codeaurora.org (Postfix) with ESMTP id D4A2F60318 for ; Mon, 9 Jul 2018 03:22:44 +0000 (UTC) Received: from mail.wl.linuxfoundation.org (localhost [127.0.0.1]) by mail.wl.linuxfoundation.org (Postfix) with ESMTP id C1C912847E for ; Mon, 9 Jul 2018 03:22:44 +0000 (UTC) Received: by mail.wl.linuxfoundation.org (Postfix, from userid 486) id B408C28A4D; Mon, 9 Jul 2018 03:22:44 +0000 (UTC) X-Spam-Checker-Version: SpamAssassin 3.3.1 (2010-03-16) on pdx-wl-mail.web.codeaurora.org X-Spam-Level: X-Spam-Status: No, score=-7.8 required=2.0 tests=BAYES_00,DKIM_SIGNED, MAILING_LIST_MULTI, RCVD_IN_DNSWL_HI, T_DKIM_INVALID autolearn=ham version=3.3.1 Received: from vger.kernel.org (vger.kernel.org [209.132.180.67]) by mail.wl.linuxfoundation.org (Postfix) with ESMTP id 5E1AF2847E for ; Mon, 9 Jul 2018 03:22:44 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S932842AbeGIDVw (ORCPT ); Sun, 8 Jul 2018 23:21:52 -0400 Received: from mail-pf0-f195.google.com ([209.85.192.195]:45705 "EHLO mail-pf0-f195.google.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S933267AbeGIDVu (ORCPT ); Sun, 8 Jul 2018 23:21:50 -0400 Received: by mail-pf0-f195.google.com with SMTP id i26-v6so1163741pfo.12 for ; Sun, 08 Jul 2018 20:21:50 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=linaro.org; s=google; h=from:to:cc:subject:date:message-id:in-reply-to:references; bh=phQAPKjHuXaJ49E6Z2SoJBvzQ21pOgO1IGo0W1Ifx3w=; b=T3hsvKmA5wT9bOLw8EqwK6etiLU05GuEo3vZ+YpAYSKfjW3csF+1Q7pdLYJ6/v4ED8 l8RXa8EkfE9ekym5jHnM529DFGgmIEMxk+NDm+nwli0yrfKXZsK55gdGbig7U1pVB3bu MhtgToBx7tvnqDlbu7IYsjqm+HoU079p3BgdU= X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20161025; h=x-gm-message-state:from:to:cc:subject:date:message-id:in-reply-to :references; bh=phQAPKjHuXaJ49E6Z2SoJBvzQ21pOgO1IGo0W1Ifx3w=; b=kJkWSraTXxSsdhJw2txfdzNzoeXU01+CERZRv3OCBkIEG8VWL6FgdpwBCvuvbeCvdA 4j5IOXMUtsl4/q2Tvy38D0DmeZ+1ezsCzXnU3BiZti2FMz/cQbE6URYppU3H84ReV7V2 q7K5pfvZTOr1bux/5M+/mISILxs5sYhSKKPa3R2pKsaRhVGU5cYxbwbcCp5iGEQyVea9 GZKK9oG84jL9bgEnbehf2TdK4PMEdDfEHBEUpOINI849dIJmWXjGA+BRHVRB80nrZCUx ljQW+5B8FidXDao9PpdGxve7faDDH267k0G/yLPGHZ+lBF9VUTGkNRLQDkQ4J3nzMm33 CvXA== X-Gm-Message-State: APt69E2X8kDkM/ld/KqJ8+DoyKx8maTtMEGUosU0Mt0C9I7lzbna/DP1 Wl4uvD7glzoJKv3xGk3oQjSmyQ== X-Google-Smtp-Source: AAOMgpf4ySqkz8KT0cIQJhNg9F4IpGb8pAOtd9hZ1h6wWlZQqW+1W2EDPhCO2RvGZMCFqx0ww3plLQ== X-Received: by 2002:a63:d518:: with SMTP id c24-v6mr11351335pgg.357.1531106510392; Sun, 08 Jul 2018 20:21:50 -0700 (PDT) Received: from ubt.spreadtrum.com ([117.18.48.102]) by smtp.gmail.com with ESMTPSA id e82-v6sm41458950pfk.87.2018.07.08.20.21.36 (version=TLS1_2 cipher=ECDHE-RSA-AES128-SHA bits=128/128); Sun, 08 Jul 2018 20:21:49 -0700 (PDT) From: Chunyan Zhang To: Ulf Hansson , Adrian Hunter Cc: linux-mmc@vger.kernel.org, linux-kernel@vger.kernel.org, Orson Zhai , Baolin Wang , Billows Wu , zhang.lyra@gmail.com Subject: [PATCH V3 4/7] mmc: sdhci: add 32-bit block count support for v4 mode Date: Mon, 9 Jul 2018 11:19:55 +0800 Message-Id: <1531106398-14062-5-git-send-email-zhang.chunyan@linaro.org> X-Mailer: git-send-email 2.7.4 In-Reply-To: <1531106398-14062-1-git-send-email-zhang.chunyan@linaro.org> References: <1531106398-14062-1-git-send-email-zhang.chunyan@linaro.org> Sender: linux-mmc-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-mmc@vger.kernel.org X-Virus-Scanned: ClamAV using ClamSMTP When Host Version 4 is enabled, SDMA System Address register is re-defined as 32-bit Block Count, and SDMA uses ADMA System Address register (05Fh-058h) instead. Signed-off-by: Chunyan Zhang --- drivers/mmc/host/sdhci.c | 4 +++- drivers/mmc/host/sdhci.h | 1 + 2 files changed, 4 insertions(+), 1 deletion(-) diff --git a/drivers/mmc/host/sdhci.c b/drivers/mmc/host/sdhci.c index 7871ae2..f64e766 100644 --- a/drivers/mmc/host/sdhci.c +++ b/drivers/mmc/host/sdhci.c @@ -889,6 +889,7 @@ static void sdhci_set_timeout(struct sdhci_host *host, struct mmc_command *cmd) static void sdhci_prepare_data(struct sdhci_host *host, struct mmc_command *cmd) { u8 ctrl; + u32 reg; struct mmc_data *data = cmd->data; host->data_timeout = 0; @@ -1021,7 +1022,8 @@ static void sdhci_prepare_data(struct sdhci_host *host, struct mmc_command *cmd) /* Set the DMA boundary value and block size */ sdhci_writew(host, SDHCI_MAKE_BLKSZ(host->sdma_boundary, data->blksz), SDHCI_BLOCK_SIZE); - sdhci_writew(host, data->blocks, SDHCI_BLOCK_COUNT); + reg = host->v4_mode ? SDHCI_32BIT_BLK_CNT : SDHCI_BLOCK_COUNT; + sdhci_writew(host, data->blocks, reg); } static inline bool sdhci_auto_cmd12(struct sdhci_host *host, diff --git a/drivers/mmc/host/sdhci.h b/drivers/mmc/host/sdhci.h index 24fa58a..889e48b 100644 --- a/drivers/mmc/host/sdhci.h +++ b/drivers/mmc/host/sdhci.h @@ -28,6 +28,7 @@ #define SDHCI_DMA_ADDRESS 0x00 #define SDHCI_ARGUMENT2 SDHCI_DMA_ADDRESS +#define SDHCI_32BIT_BLK_CNT SDHCI_DMA_ADDRESS #define SDHCI_BLOCK_SIZE 0x04 #define SDHCI_MAKE_BLKSZ(dma, blksz) (((dma & 0x7) << 12) | (blksz & 0xFFF))