From patchwork Tue Mar 19 09:12:58 2019 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Shawn Lin X-Patchwork-Id: 10859149 Return-Path: Received: from mail.wl.linuxfoundation.org (pdx-wl-mail.web.codeaurora.org [172.30.200.125]) by pdx-korg-patchwork-2.web.codeaurora.org (Postfix) with ESMTP id 6AC0A15AC for ; Tue, 19 Mar 2019 09:15:32 +0000 (UTC) Received: from mail.wl.linuxfoundation.org (localhost [127.0.0.1]) by mail.wl.linuxfoundation.org (Postfix) with ESMTP id 4FCE228C40 for ; Tue, 19 Mar 2019 09:15:32 +0000 (UTC) Received: by mail.wl.linuxfoundation.org (Postfix, from userid 486) id 3B742295DA; Tue, 19 Mar 2019 09:15:32 +0000 (UTC) X-Spam-Checker-Version: SpamAssassin 3.3.1 (2010-03-16) on pdx-wl-mail.web.codeaurora.org X-Spam-Level: X-Spam-Status: No, score=-6.4 required=2.0 tests=BAYES_00,MAILING_LIST_MULTI, RCVD_IN_DNSWL_HI,RCVD_IN_SORBS_WEB autolearn=ham version=3.3.1 Received: from vger.kernel.org (vger.kernel.org [209.132.180.67]) by mail.wl.linuxfoundation.org (Postfix) with ESMTP id CC75928C40 for ; Tue, 19 Mar 2019 09:15:31 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1725934AbfCSJPb (ORCPT ); Tue, 19 Mar 2019 05:15:31 -0400 Received: from lucky1.263xmail.com ([211.157.147.131]:43438 "EHLO lucky1.263xmail.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1725906AbfCSJPb (ORCPT ); Tue, 19 Mar 2019 05:15:31 -0400 Received: from shawn.lin?rock-chips.com (unknown [192.168.167.230]) by lucky1.263xmail.com (Postfix) with ESMTP id C221655CE6; Tue, 19 Mar 2019 17:15:24 +0800 (CST) X-263anti-spam: KSV:0; X-MAIL-GRAY: 1 X-MAIL-DELIVERY: 0 X-KSVirus-check: 0 X-ABS-CHECKED: 4 Received: from localhost.localdomain (unknown [58.22.7.114]) by smtp.263.net (postfix) whith ESMTP id P5590T140485355104000S1552986885594231_; Tue, 19 Mar 2019 17:15:23 +0800 (CST) X-IP-DOMAINF: 1 X-UNIQUE-TAG: X-RL-SENDER: shawn.lin@rock-chips.com X-SENDER: lintao@rock-chips.com X-LOGIN-NAME: shawn.lin@rock-chips.com X-FST-TO: jh80.chung@samsung.com X-SENDER-IP: 58.22.7.114 X-ATTACHMENT-NUM: 0 X-DNS-TYPE: 0 From: Shawn Lin To: Jaehoon Chung , Ulf Hansson Cc: linux-mmc@vger.kernel.org, linux-rockchip@lists.infradead.org, Douglas Anderson , Shawn Lin Subject: [PATCH v3 3/3] mmc: dw_mmc-rockchip: Enable hardware unbusy interrupt support Date: Tue, 19 Mar 2019 17:12:58 +0800 Message-Id: <1552986778-33904-4-git-send-email-shawn.lin@rock-chips.com> X-Mailer: git-send-email 1.9.1 In-Reply-To: <1552986778-33904-1-git-send-email-shawn.lin@rock-chips.com> References: <1552986778-33904-1-git-send-email-shawn.lin@rock-chips.com> Sender: linux-mmc-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-mmc@vger.kernel.org X-Virus-Scanned: ClamAV using ClamSMTP The new register for controlling hardware unbusy interrupt is in 0x120. It looks like: |------------------------------------------------------------| |Bit | Attribute | Reset Value | Description | |------------------------------------------------------------| |31:25 | RO | 0x0 | reserved | |------------------------------------------------------------| |24 | RO | 0x0 | rdyint_cnt_finish | | | | |When high, it indicates| | | | |that the rdyint counter| | | | |is finished. | |------------------------------------------------------------| |23:16 | RO | 0x0 | rdyint_cnt_status | | | | |Couner status, reflect | | | | |internal counter value.| |------------------------------------------------------------| |15:9 | RO | 0x0 | reserved | |------------------------------------------------------------| |8 | RW | 0x0 | rdyint_gen_working | | | | |When set, IP starts to | | | | |count and generate one | | | | |rdyint trigger. After | | | | |the rdyint trigger is | | | | |generated, it will be | | | | |cleaned automatically. | | | | |Software should set it | | | | |again next time. | |------------------------------------------------------------| |7:0 | RW | 0xff | rdyint_gen_maxval | | | | |Max counter value for | | | | |the IP to count when | | | | |rdyint_gen_working is | | | | |set. This counter is | | | | |based on biu_clk. | |------------------------------------------------------------| Signed-off-by: Shawn Lin Tested-by: Ziyuan Xu --- Changes in v3: None Changes in v2: None drivers/mmc/host/dw_mmc-rockchip.c | 30 ++++++++++++++++++++++++++++++ 1 file changed, 30 insertions(+) diff --git a/drivers/mmc/host/dw_mmc-rockchip.c b/drivers/mmc/host/dw_mmc-rockchip.c index 8c86a80..85b1e42 100644 --- a/drivers/mmc/host/dw_mmc-rockchip.c +++ b/drivers/mmc/host/dw_mmc-rockchip.c @@ -20,6 +20,9 @@ #include "dw_mmc-pltfm.h" #define RK3288_CLKGEN_DIV 2 +#define RKMMC_RDYINT_GEN 0x120 +#define RKMMC_RDYINT_GEN_WORKING BIT(8) +#define RKMMC_RDYINT_GEN_MAXVAL GENMASK(7, 0) struct dw_mci_rockchip_priv_data { struct clk *drv_clk; @@ -28,6 +31,23 @@ struct dw_mci_rockchip_priv_data { int num_phases; }; +static int dw_mci_rockchip_prepare_hw_unbusy(struct dw_mci *host, + bool enable) +{ + u32 reg = readl(host->regs + RKMMC_RDYINT_GEN); + + if (enable) + /* Self-clean when generating unbusy int */ + reg |= RKMMC_RDYINT_GEN_WORKING; + else + /* Otherwise do it manually to avoid racing condition */ + reg &= ~RKMMC_RDYINT_GEN_WORKING; + + writel(reg, host->regs + RKMMC_RDYINT_GEN); + + return 0; +} + static void dw_mci_rk3288_set_ios(struct dw_mci *host, struct mmc_ios *ios) { struct dw_mci_rockchip_priv_data *priv = host->priv; @@ -301,6 +321,15 @@ static int dw_mci_rockchip_init(struct dw_mci *host) "rockchip,rk3288-dw-mshc")) host->bus_hz /= RK3288_CLKGEN_DIV; + /* Some Rockchip SoCs use hw unbusy int */ + if (of_device_is_compatible(host->dev->of_node, + "rockchip,rk1808-dw-mshc")) { + host->hw_unbusy_int = 16; + writel(~(RKMMC_RDYINT_GEN_WORKING | + RKMMC_RDYINT_GEN_MAXVAL), + host->regs + RKMMC_RDYINT_GEN); + } + return 0; } @@ -322,6 +351,7 @@ static int dw_mci_rockchip_init(struct dw_mci *host) .set_ios = dw_mci_rk3288_set_ios, .execute_tuning = dw_mci_rk3288_execute_tuning, .parse_dt = dw_mci_rk3288_parse_dt, + .prepare_hw_unbusy = dw_mci_rockchip_prepare_hw_unbusy, .init = dw_mci_rockchip_init, };