From patchwork Wed Apr 22 16:32:29 2020 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Sowjanya Komatineni X-Patchwork-Id: 11504247 Return-Path: Received: from mail.kernel.org (pdx-korg-mail-1.web.codeaurora.org [172.30.200.123]) by pdx-korg-patchwork-2.web.codeaurora.org (Postfix) with ESMTP id D1A80912 for ; Wed, 22 Apr 2020 16:32:41 +0000 (UTC) Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by mail.kernel.org (Postfix) with ESMTP id B7C0121473 for ; Wed, 22 Apr 2020 16:32:41 +0000 (UTC) Authentication-Results: mail.kernel.org; dkim=pass (2048-bit key) header.d=nvidia.com header.i=@nvidia.com header.b="Q+aOwso/" Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1726750AbgDVQcf (ORCPT ); Wed, 22 Apr 2020 12:32:35 -0400 Received: from hqnvemgate26.nvidia.com ([216.228.121.65]:3302 "EHLO hqnvemgate26.nvidia.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1726105AbgDVQce (ORCPT ); Wed, 22 Apr 2020 12:32:34 -0400 Received: from hqpgpgate102.nvidia.com (Not Verified[216.228.121.13]) by hqnvemgate26.nvidia.com (using TLS: TLSv1.2, DES-CBC3-SHA) id ; Wed, 22 Apr 2020 09:32:21 -0700 Received: from hqmail.nvidia.com ([172.20.161.6]) by hqpgpgate102.nvidia.com (PGP Universal service); Wed, 22 Apr 2020 09:32:33 -0700 X-PGP-Universal: processed; by hqpgpgate102.nvidia.com on Wed, 22 Apr 2020 09:32:33 -0700 Received: from HQMAIL101.nvidia.com (172.20.187.10) by HQMAIL105.nvidia.com (172.20.187.12) with Microsoft SMTP Server (TLS) id 15.0.1473.3; Wed, 22 Apr 2020 16:32:33 +0000 Received: from hqnvemgw03.nvidia.com (10.124.88.68) by HQMAIL101.nvidia.com (172.20.187.10) with Microsoft SMTP Server (TLS) id 15.0.1473.3 via Frontend Transport; Wed, 22 Apr 2020 16:32:33 +0000 Received: from skomatineni-linux.nvidia.com (Not Verified[10.2.165.49]) by hqnvemgw03.nvidia.com with Trustwave SEG (v7,5,8,10121) id ; Wed, 22 Apr 2020 09:32:33 -0700 From: Sowjanya Komatineni To: , , , , , , , , , CC: , , , Subject: [PATCH 5.4.33 2/2] sdhci: tegra: Enable MMC_CAP_WAIT_WHILE_BUSY host capability Date: Wed, 22 Apr 2020 09:32:29 -0700 Message-ID: <1587573149-30269-3-git-send-email-skomatineni@nvidia.com> X-Mailer: git-send-email 2.7.4 In-Reply-To: <1587573149-30269-1-git-send-email-skomatineni@nvidia.com> References: <1587573149-30269-1-git-send-email-skomatineni@nvidia.com> X-NVConfidentiality: public MIME-Version: 1.0 DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=nvidia.com; s=n1; t=1587573141; bh=AI2k/GeOJka+x5ydpwPpmWF5ssDecgtebTTmy/odja0=; h=X-PGP-Universal:From:To:CC:Subject:Date:Message-ID:X-Mailer: In-Reply-To:References:X-NVConfidentiality:MIME-Version: Content-Type; b=Q+aOwso//9q/gPBeXksB5egUqJegSFWCyFX80F1/NwPCodYcBTfoGSN3tUWNQUkjO /7r0YyeGW9fq1ELEX2gP7xtFWYilCBBbVc2Zl8gi8EuNZlg1+oqWhT/q9MfV5JzAvU EKJ0XUIP7RSjebfPEvrp++WkvtHMlJM4WiZr8zGzGKJW53xhM6++RFg17mdEDOSCOy JzJ/MTZDkKHjFGeCCUCbOV1GcLODeJotn8kMkqcOpsoTqbNusjucuOyOM89k5hPbtu fdYYGWm6UGHbpKkiOPfqn2KzhOd26Df0YzfpiQVkIMECH7LWkXdacFDqWk1DtxWYX7 Im5IHCYAZ0RoA== Sender: linux-mmc-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-mmc@vger.kernel.org commit ff124c31ccd7 ("sdhci: tegra: Enable MMC_CAP_WAIT_WHILE_BUSY host capability") Tegra sdhci host supports HW busy detection of the device busy signaling over data0 lane. So, this patch enables host capability MMC_CAP_wAIT_WHILE_BUSY. Cc: Signed-off-by: Sowjanya Komatineni --- drivers/mmc/host/sdhci-tegra.c | 2 ++ 1 file changed, 2 insertions(+) diff --git a/drivers/mmc/host/sdhci-tegra.c b/drivers/mmc/host/sdhci-tegra.c index fa8f6a4..1c381f8 100644 --- a/drivers/mmc/host/sdhci-tegra.c +++ b/drivers/mmc/host/sdhci-tegra.c @@ -1580,6 +1580,8 @@ static int sdhci_tegra_probe(struct platform_device *pdev) if (rc) goto err_parse_dt; + host->mmc->caps |= MMC_CAP_WAIT_WHILE_BUSY; + if (tegra_host->soc_data->nvquirks & NVQUIRK_ENABLE_DDR50) host->mmc->caps |= MMC_CAP_1_8V_DDR;