From patchwork Tue Dec 7 17:56:49 2010 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Philip Rakity X-Patchwork-Id: 383772 Received: from vger.kernel.org (vger.kernel.org [209.132.180.67]) by demeter1.kernel.org (8.14.4/8.14.3) with ESMTP id oB7I0Z8b001515 for ; Tue, 7 Dec 2010 18:00:45 GMT Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1752207Ab0LGSAo (ORCPT ); Tue, 7 Dec 2010 13:00:44 -0500 Received: from na3sys009aog112.obsmtp.com ([74.125.149.207]:57598 "HELO na3sys009aog112.obsmtp.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with SMTP id S1751808Ab0LGSAo convert rfc822-to-8bit (ORCPT ); Tue, 7 Dec 2010 13:00:44 -0500 Received: from source ([65.219.4.130]) (using TLSv1) by na3sys009aob112.postini.com ([74.125.148.12]) with SMTP ID DSNKTP52R3uqzFL8gKTq+NKmcNnd57qbI0pb@postini.com; Tue, 07 Dec 2010 10:00:44 PST Received: from SC-vEXCH3.marvell.com ([10.93.76.133]) by sc-owa02.marvell.com ([10.93.76.22]) with mapi; Tue, 7 Dec 2010 09:56:50 -0800 From: Philip Rakity To: "linux-mmc@vger.kernel.org" CC: Nicolas Pitre , Mark Brown , Chris Ball Date: Tue, 7 Dec 2010 09:56:49 -0800 Subject: [PATCH V2 3/3] sdhci: support H/W clock gating in Marvell PXA driver Thread-Topic: [PATCH V2 3/3] sdhci: support H/W clock gating in Marvell PXA driver Thread-Index: AcuWOCABr9G4G4QJTmWQvaxI+ugkHA== Message-ID: <192979DE-DB3E-467B-BD5B-B52049248CC6@marvell.com> Accept-Language: en-US Content-Language: en-US X-MS-Has-Attach: X-MS-TNEF-Correlator: acceptlanguage: en-US MIME-Version: 1.0 Sender: linux-mmc-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-mmc@vger.kernel.org X-Greylist: IP, sender and recipient auto-whitelisted, not delayed by milter-greylist-4.2.3 (demeter1.kernel.org [140.211.167.41]); Tue, 07 Dec 2010 18:00:45 +0000 (UTC) diff --git a/drivers/mmc/host/sdhci.c b/drivers/mmc/host/sdhci.c index 8a74fcb..c2e7c9e 100644 --- a/drivers/mmc/host/sdhci.c +++ b/drivers/mmc/host/sdhci.c @@ -1188,6 +1188,12 @@ static void sdhci_set_ios(struct mmc_host *mmc, struct mmc_ios *ios) if (host->ops->platform_send_init_74_clocks) host->ops->platform_send_init_74_clocks(host, ios->power_mode); +#ifdef CONFIG_MMC_CLKGATE + if ((mmc->caps & MMC_CAP_HW_CLOCK_GATING) + && host->ops->platform_hw_clk_gate) + host->ops->platform_hw_clk_gate(host); +#endif + /* * If your platform has 8-bit width support but is not a v3 controller, * or if it requires special setup code, you should implement that in diff --git a/drivers/mmc/host/sdhci.h b/drivers/mmc/host/sdhci.h index 1efe7dc..26a8c09 100644 --- a/drivers/mmc/host/sdhci.h +++ b/drivers/mmc/host/sdhci.h @@ -221,6 +221,7 @@ struct sdhci_ops { void (*platform_send_init_74_clocks)(struct sdhci_host *host, u8 power_mode); unsigned int (*get_ro)(struct sdhci_host *host); + void (*platform_hw_clk_gate)(struct sdhci_host *host); }; #ifdef CONFIG_MMC_SDHCI_IO_ACCESSORS