From patchwork Fri Jan 20 19:43:31 2017 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Chris Brandt X-Patchwork-Id: 9529355 Return-Path: Received: from mail.wl.linuxfoundation.org (pdx-wl-mail.web.codeaurora.org [172.30.200.125]) by pdx-korg-patchwork.web.codeaurora.org (Postfix) with ESMTP id 2C9EC60463 for ; Fri, 20 Jan 2017 19:44:16 +0000 (UTC) Received: from mail.wl.linuxfoundation.org (localhost [127.0.0.1]) by mail.wl.linuxfoundation.org (Postfix) with ESMTP id 1B8222857F for ; Fri, 20 Jan 2017 19:44:16 +0000 (UTC) Received: by mail.wl.linuxfoundation.org (Postfix, from userid 486) id 0D83D2859B; Fri, 20 Jan 2017 19:44:16 +0000 (UTC) X-Spam-Checker-Version: SpamAssassin 3.3.1 (2010-03-16) on pdx-wl-mail.web.codeaurora.org X-Spam-Level: X-Spam-Status: No, score=-6.9 required=2.0 tests=BAYES_00,RCVD_IN_DNSWL_HI autolearn=ham version=3.3.1 Received: from vger.kernel.org (vger.kernel.org [209.132.180.67]) by mail.wl.linuxfoundation.org (Postfix) with ESMTP id A26FE2857F for ; Fri, 20 Jan 2017 19:44:15 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1753134AbdATToN (ORCPT ); Fri, 20 Jan 2017 14:44:13 -0500 Received: from relmlor4.renesas.com ([210.160.252.174]:61658 "EHLO relmlie3.idc.renesas.com" rhost-flags-OK-OK-OK-FAIL) by vger.kernel.org with ESMTP id S1753118AbdATToL (ORCPT ); Fri, 20 Jan 2017 14:44:11 -0500 Received: from unknown (HELO relmlir3.idc.renesas.com) ([10.200.68.153]) by relmlie3.idc.renesas.com with ESMTP; 21 Jan 2017 04:44:09 +0900 Received: from relmlac4.idc.renesas.com (relmlac4.idc.renesas.com [10.200.69.24]) by relmlir3.idc.renesas.com (Postfix) with ESMTP id A932E44BA4; Sat, 21 Jan 2017 04:44:09 +0900 (JST) Received: by relmlac4.idc.renesas.com (Postfix, from userid 0) id 9001C48014; Sat, 21 Jan 2017 04:44:09 +0900 (JST) Received: from relmlac4.idc.renesas.com (localhost [127.0.0.1]) by relmlac4.idc.renesas.com (Postfix) with ESMTP id 6C35C480A6; Sat, 21 Jan 2017 04:44:09 +0900 (JST) Received: from relmlii2.idc.renesas.com [10.200.68.66] by relmlac4.idc.renesas.com with ESMTP id EAA06601; Sat, 21 Jan 2017 04:44:09 +0900 X-IronPort-AV: E=Sophos;i="5.33,259,1477926000"; d="scan'208";a="232074139" Received: from unknown (HELO rtamta01.rta.renesas.com) ([143.103.48.75]) by relmlii2.idc.renesas.com with ESMTP; 21 Jan 2017 04:44:07 +0900 Received: from localhost.localdomain (unknown [172.27.49.212]) by rtamta01.rta.renesas.com (Postfix) with ESMTP id 9DA955C7; Fri, 20 Jan 2017 19:44:00 +0000 (UTC) From: Chris Brandt To: Ulf Hansson , Rob Herring , Mark Rutland , Simon Horman , Wolfram Sang , Geert Uytterhoeven Cc: devicetree@vger.kernel.org, linux-mmc@vger.kernel.org, linux-renesas-soc@vger.kernel.org, Chris Brandt Subject: [PATCH v4 2/3] mmc: sh_mobile_sdhi: explain clock bindings Date: Fri, 20 Jan 2017 14:43:31 -0500 Message-Id: <20170120194332.1683-3-chris.brandt@renesas.com> X-Mailer: git-send-email 2.10.1 In-Reply-To: <20170120194332.1683-1-chris.brandt@renesas.com> References: <20170120194332.1683-1-chris.brandt@renesas.com> Sender: linux-mmc-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-mmc@vger.kernel.org X-Virus-Scanned: ClamAV using ClamSMTP In the case of a single clock source, you don't need names. However, if the controller has 2 clock sources, you need to name them correctly so the driver can find the 2nd one. The 2nd clock is for the internal card detect logic and must be enabled/disabled along with the main core clock. Signed-off-by: Chris Brandt --- v3: * add more clarification about why there are sometimes 2 clocks and what you should do with them. * remove 'status = "disabled"' from example v2: * fix spelling and change wording * changed clock name from "carddetect" to "cd" --- Documentation/devicetree/bindings/mmc/tmio_mmc.txt | 28 ++++++++++++++++++++++ 1 file changed, 28 insertions(+) diff --git a/Documentation/devicetree/bindings/mmc/tmio_mmc.txt b/Documentation/devicetree/bindings/mmc/tmio_mmc.txt index a1650ed..9033c6a 100644 --- a/Documentation/devicetree/bindings/mmc/tmio_mmc.txt +++ b/Documentation/devicetree/bindings/mmc/tmio_mmc.txt @@ -25,8 +25,36 @@ Required properties: "renesas,sdhi-r8a7795" - SDHI IP on R8A7795 SoC "renesas,sdhi-r8a7796" - SDHI IP on R8A7796 SoC +- clocks: Most controllers only have 1 clock source per channel. However, on + some variations of this controller, the internal card detection + logic that exists in this controller is sectioned off to be run by a + separate second clock source to allow the main core clock to be turned + off to save power. Unfortunately, the existing driver architecture + does not support such a separation of clocks. + Additionally, it is prohibited to supply a clock to the core but not + to the card detect circuit. That leaves you with if separate clocks + are presented, you must treat them both as 1. + If 2 clocks are specified by the hardware, you must name them as + "core" and "cd". + If the controller only has 1 clock, naming is not required. + Optional properties: - toshiba,mmc-wrprotect-disable: write-protect detection is unavailable - pinctrl-names: should be "default", "state_uhs" - pinctrl-0: should contain default/high speed pin ctrl - pinctrl-1: should contain uhs mode pin ctrl + +Example showing 2 clocks: + sdhi0: sd@e804e000 { + compatible = "renesas,sdhi-r7s72100"; + reg = <0xe804e000 0x100>; + interrupts = ; + + clocks = <&mstp12_clks R7S72100_CLK_SDHI00>, + <&mstp12_clks R7S72100_CLK_SDHI01>; + clock-names = "core", "cd"; + cap-sd-highspeed; + cap-sdio-irq; + };