From patchwork Fri May 19 08:15:10 2017 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Kishon Vijay Abraham I X-Patchwork-Id: 9736427 Return-Path: Received: from mail.wl.linuxfoundation.org (pdx-wl-mail.web.codeaurora.org [172.30.200.125]) by pdx-korg-patchwork.web.codeaurora.org (Postfix) with ESMTP id 550066020B for ; Fri, 19 May 2017 08:29:53 +0000 (UTC) Received: from mail.wl.linuxfoundation.org (localhost [127.0.0.1]) by mail.wl.linuxfoundation.org (Postfix) with ESMTP id 3048C286E6 for ; Fri, 19 May 2017 08:29:53 +0000 (UTC) Received: by mail.wl.linuxfoundation.org (Postfix, from userid 486) id 2520C288A7; Fri, 19 May 2017 08:29:53 +0000 (UTC) X-Spam-Checker-Version: SpamAssassin 3.3.1 (2010-03-16) on pdx-wl-mail.web.codeaurora.org X-Spam-Level: X-Spam-Status: No, score=-6.8 required=2.0 tests=BAYES_00,DKIM_SIGNED, RCVD_IN_DNSWL_HI,T_DKIM_INVALID autolearn=ham version=3.3.1 Received: from vger.kernel.org (vger.kernel.org [209.132.180.67]) by mail.wl.linuxfoundation.org (Postfix) with ESMTP id CC568286E6 for ; Fri, 19 May 2017 08:29:52 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1754974AbdESI3B (ORCPT ); Fri, 19 May 2017 04:29:01 -0400 Received: from lelnx193.ext.ti.com ([198.47.27.77]:10315 "EHLO lelnx193.ext.ti.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1753616AbdESIRY (ORCPT ); Fri, 19 May 2017 04:17:24 -0400 Received: from dflxv15.itg.ti.com ([128.247.5.124]) by lelnx193.ext.ti.com (8.15.1/8.15.1) with ESMTP id v4J8GVFr018049; Fri, 19 May 2017 03:16:31 -0500 DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=ti.com; s=ti-com-17Q1; t=1495181791; bh=tJcqMrGTe8cy+byhs8Meyz6zYK+Os8bJW1NfCGrR6rQ=; h=From:To:CC:Subject:Date:In-Reply-To:References; b=dTru1mKE3R8LUZWrgjGfENSD5OKr6PHtHuWX+qvan6IiZ3FIwqpkqAuklHxkPYEmm wu3IYB1FNH3LIhLkNdIVgAIwb0ylklVG0CgpCjg0mbFgCJuJgHAiQq4zjbE6uk6Jts AdEJ9JPj2gD4vk/6icoT4Z5Ft6+oGyDS0d+L+jhs= Received: from DFLE73.ent.ti.com (dfle73.ent.ti.com [128.247.5.110]) by dflxv15.itg.ti.com (8.14.3/8.13.8) with ESMTP id v4J8GVbe026788; Fri, 19 May 2017 03:16:31 -0500 Received: from dlep33.itg.ti.com (157.170.170.75) by DFLE73.ent.ti.com (128.247.5.110) with Microsoft SMTP Server id 14.3.294.0; Fri, 19 May 2017 03:16:31 -0500 Received: from a0393678ub.india.ti.com (ileax41-snat.itg.ti.com [10.172.224.153]) by dlep33.itg.ti.com (8.14.3/8.13.8) with ESMTP id v4J8FfQH009185; Fri, 19 May 2017 03:16:27 -0500 From: Kishon Vijay Abraham I To: Ulf Hansson , Rob Herring , Tony Lindgren CC: , , , , , , Jonathan Corbet , Mark Rutland , Russell King , , Subject: [PATCH 10/41] mmc: host: omap_hsmmc: Prepare *set_timing() to be used for iodelay setting Date: Fri, 19 May 2017 13:45:10 +0530 Message-ID: <20170519081541.26753-11-kishon@ti.com> X-Mailer: git-send-email 2.11.0 In-Reply-To: <20170519081541.26753-1-kishon@ti.com> References: <20170519081541.26753-1-kishon@ti.com> MIME-Version: 1.0 Sender: linux-mmc-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-mmc@vger.kernel.org X-Virus-Scanned: ClamAV using ClamSMTP No functional change. Add separate case statements for certain timing like MMC_TIMING_SD_HS and MMC_TIMING_MMC_HS even though AC12_UHSMC_RES has to be written to the AC12 register (same as for default modes). Also have separate case sections for MMC_TIMING_UHS_SDR104 and MMC_TIMING_UHS_HS200 even though the same UHSMC value has to be written to the AC12 register. This is in preparation for setting iodelay values. Signed-off-by: Kishon Vijay Abraham I Signed-off-by: Sekhar Nori --- drivers/mmc/host/omap_hsmmc.c | 9 +++++++++ 1 file changed, 9 insertions(+) diff --git a/drivers/mmc/host/omap_hsmmc.c b/drivers/mmc/host/omap_hsmmc.c index 9ac18521e097..7088a88074a8 100644 --- a/drivers/mmc/host/omap_hsmmc.c +++ b/drivers/mmc/host/omap_hsmmc.c @@ -1737,6 +1737,8 @@ static void omap_hsmmc_set_timing(struct omap_hsmmc_host *host) val &= ~AC12_UHSMC_MASK; switch (ios->timing) { case MMC_TIMING_UHS_SDR104: + val |= AC12_UHSMC_SDR104; + break; case MMC_TIMING_MMC_HS200: val |= AC12_UHSMC_SDR104; break; @@ -1752,6 +1754,13 @@ static void omap_hsmmc_set_timing(struct omap_hsmmc_host *host) case MMC_TIMING_UHS_SDR12: val |= AC12_UHSMC_SDR12; break; + case MMC_TIMING_SD_HS: + case MMC_TIMING_MMC_HS: + val |= AC12_UHSMC_RES; + break; + case MMC_TIMING_MMC_DDR52: + val |= AC12_UHSMC_RES; + break; default: val |= AC12_UHSMC_RES; break;